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Accellera Approves Portable Stimulus Standard – and more…

Accellera Approves Portable Stimulus Standard – and more…

Portable Stimulus Takes Center Stage at 2018 Design Automation Conference Accellera Systems Initiative technical teams have been busy the past…

Portable Stimulus (and Other Standards) at DAC

Portable Stimulus (and Other Standards) at DAC

We’re about to embark on my favorite (professional) time of the year! That’s right, the 55th Design Automation Conference is…

Siemens Acquires Austemper Design Systems

Siemens Acquires Austemper Design Systems

Breakthrough IC Functional Safety Technology Strengthens Mentor Product Offerings In today’s complex automotive, industrial, medical and aerospace systems, functional safety…

Applying Portable Stimulus at DAC

Applying Portable Stimulus at DAC

It’s that time of year once again – DAC is just around the corner! I’m very excited to be able…

Verification Academy’s DAC Must See Recommendations

Verification Academy’s DAC Must See Recommendations

This year the Verification Academy is celebrating two big events at DAC 2018. First, this is the Verification Academy’s tenth…

DAC 2018—No Man Ever Steps into the Same River Twice

DAC 2018—No Man Ever Steps into the Same River Twice

Perhaps it’s too early in the day to reference Greek philosophers, such as Heraclitus. I must admit that I haven’t…

Verification is from Vulcan, Validation is from Pandora

Verification is from Vulcan, Validation is from Pandora

At DVCon earlier this year, I was lucky enough to present to the munching masses at the Wednesday lunch. Now,…

Significantly Improve Your FPGA Design Reliability by Using Custom CDC Synchronizers

Significantly Improve Your FPGA Design Reliability by Using Custom CDC Synchronizers

[Preface: we are presenting a paper on this topic at the upcoming SEE/MAPLD conference, May 21-24, 2018 in La Jolla,…

Accellera Proposes a New Working Group

Accellera Proposes a New Working Group

Accellera to explore the need for an IP Security Assurance Standard In the era of SoC design where major design…