The age of AI comes to IC test automation

Learn how artificial intelligence (AI) is advancing IC test and yield analysis.

RISC-V – It’s not just about the core, it’s also about the system

Tessent Embedded Analytics offers an integrated range of hardware and software tools that accelerate debug of RISC-V based SoCs.

Debugging a RISC-V processor requires integrated hardware and software tools

Debugging a RISC-V processor requires integrated hardware and software tools

Tessent Embedded Analytics offers an integrated range of hardware and software tools that accelerate debug of RISC-V based SoCs.

The future of in-system testing for automotive safety

Suppliers of IP for automotive applications must ensure their IP blocks are ISO 26262 compliant. Siemens has the solutions for automotive safety and reliability.

Event: Tessent 2023 DFT Tech Forum

Attend the 2023 DFT Tech Forum to learn how Tessent silicon lifecycle solutions solve your complex SoC DFT challenges.

Typical allocation of functional safety within an automotive SoC.

Webinar: Meet the Challenges of ISO 26262 with Tessent Test Solutions

Register Now! Tune in on June 9, 2022 at 11:00 am (pacific daylight time) to learn how to use Tessent…

D&R IP-SoC Day 2022 Silicon Valley

Siemens EDA talks cybersecurity at IP-SoC Silicon Valley

The Tessent group participated in the “unique event fully dedicated to IP and IP-based electronic systems,” D&R IP-SoC Silicon Valley…

Automated shared bus interface memory test

Webinar: Memory test using a shared bus Interface

The explosive growth in the use of memory content on SoCs calls for a new solution to effectively access the…

Learn about on-chip monitoring and analysis with Tessent Embedded Analytics SDK

Large and complex SoCs with embedded systems play a big role in the technology we depend on, from intelligent 5G…