Latest posts

AI/ML Accelerator Tutorial: C-level Design & Verification Using HLS | Virtual Seminar

AI/ML Accelerator Tutorial: C-level Design & Verification Using HLS | Virtual Seminar

Catapult HLS (High-Level Synthesis) and C-level design and verification are reducing entire project development times by half or more in…

Join Tessent at the VOICE Developer Conference

Tessent invites you to join us at the upcoming VOICE Developer Conference happening virtually from June 21-23, 2021. VOICE is…

Learn about on-chip monitoring and analysis with Tessent Embedded Analytics SDK

Large and complex SoCs with embedded systems play a big role in the technology we depend on, from intelligent 5G…

Read the 2020 ITC paper: Tessent Streaming Scan Network

At the 2020 International Test Conference, a paper by scientists from Siemens Digital Industries Software and Intel, describes how the…

Advanced Synthesis for NanoXplore FPGAs  | Webinar

Advanced Synthesis for NanoXplore FPGAs | Webinar

Many space and mil-aero applications require the use of specialized FPGAs with built-in protection from single event upsets. NanoXplore introduces…

RealizeLIVE + User2User

Don’t miss these Tessent sessions at Realize LIVE + User2User event – May 26, 2021

Explore the latest DFT, operations and embedded analytics technologies at Realize LIVE + U2U 2021. The May 26, 2021 user…

Manage the effects of chip complexity with Embedded Analytics

By Richard Oxland – Siemens Digital Industries Software If you’ve never heard of Embedded Analytics, it’s time to learn how…

VTS 2020 best paper_Tessent

Tessent wins Best Paper award at IEEE VLSI Test Symposium

The best paper of the 2020 symposium describes a layout-friendly EDT decompressor that reduces routing congestion associated with decompressor circuitry…

Convolutional Neural Network Quantization for Low-Power | Webinar

Convolutional Neural Network Quantization for Low-Power | Webinar

Inferencing for Convolutional Neural Network(s) (CNNs) is notoriously compute intensive. This makes them an ideal candidate for hardware acceleration, which…