Pattern Matching in Test and Yield Analysis

Pattern Matching in Test and Yield Analysis

By Geir Eide and Jonathan Muirhead Analyzing fail data with pattern matching helps companies identify yield limiters faster to increase…

Getting the best of ATPG and LBIST – a Hybrid Test Solution for Autonomous & High-precision IC Test

Getting the best of ATPG and LBIST – a Hybrid Test Solution for Autonomous & High-precision IC Test

By Ron Press, Mentor Graphics Try Hybrid ATPG and LBIST when you need both in-system test and advanced fault detection.

Ensure defect-free automotive ICs with the Hybrid TK/LBIST solution that also finds faults in the DFT logic

Ensure defect-free automotive ICs with the Hybrid TK/LBIST solution that also finds faults in the DFT logic

By Rahul Singhal, Mentor Graphics Near-zero defect testing for safety-critical ICs means also testing the DFT logic.

3D IC Test: Now and the Road Ahead

3D IC Test: Now and the Road Ahead

By Martin Keim, Mentor Graphics What’s new in 3D IC testing? This summary from an ISTFA tutorial has the answers

Take scan test out of the critical path

Take scan test out of the critical path

By Ron Press, Mentor Graphics DFT with less risk to your design flow? Here’s how.  

Test Pattern Retargeting in 3D SICs using an IEEE 1687 based 3DFT architecture

Test Pattern Retargeting in 3D SICs using an IEEE 1687 based 3DFT architecture

Retarget your 2D test to 3D with IJTAG

Hierarchical DFT: How to Do More, More Quickly, with Fewer Resources

Hierarchical DFT: How to Do More, More Quickly, with Fewer Resources

By Rick Fisette, Mentor Graphics Is DFT a barrier to tapeout? Time to consider going hierarchical.

Automotive Semiconductor Test

Automotive Semiconductor Test

By Steve Pateras, Mentor Graphics Ensure quality and reliability in automotive ICs with the newest technologies in silicon test.

Memory BIST for automotive designs

Memory BIST for automotive designs

By Steve Pateras, Mentor Graphics Memory BIST is evolving to meet the demands of automotive ICs.