Intel used the Tessent cell-aware, defect-oriented test to reap stunning reductions in DDPM for an automotive IC. Intel Principal Engineer…
Excerpt from article: “Delivering Smarter Faster With Toolkit for IC Innovation“ The new Catapult software High-Level Synthesis (HLS) AI Toolkit…
The ICs that drive automotive electronic systems tend to be large and complex, with both digital and analog portions that…
Excerpt from article: “Mentor Extends AI Footprint“ Siemens EDA are stepping up their game in AI/ML. They already had a…
Excerpt from article: “AI and ML fuel Catapult and Calibre updates“ Catapult HLS AI As more processing necessarily moves away…
Excerpt from article: “Mentor Juices AI Chips with AI“ On the brink of the Design Automation Conference (DAC), EDA companies…
Excerpt from article: “Raising The Abstraction Level For Power“ Early analysis can lead to the largest gains. “Certainly, higher abstraction provides more…
Excerpt from article: “Raising the Abstraction Level for Power“ Architectural Power Early analysis can lead to the largest gains. “Certainly, higher…
Mentor and Arm® teamed up to create a new reference flow for performing register transfer level (RTL) hierarchical DFT and…
