U2U 2017 – See you there!

U2U 2017 – See you there!

Mentor’s user group event this year is located at the Santa Clara Marriott on April 4, 2017. Here’s what you…

What the DFT! A shortcut to hierarchical DFT

What the DFT! A shortcut to hierarchical DFT

By Ron Press, Mentor Graphics The no money down, no design change way to benefit from hierarchical DFT

Smarter Benchtop Test for Reduced Turnaround Time

Smarter Benchtop Test for Reduced Turnaround Time

Use bench-top ATPG bring-up to better understand and interact with silicon bring-up test data and reduce silicon bring-up cycle time….

A Full Life-Cycle View of Automotive Test

A Full Life-Cycle View of Automotive Test

By Steve Pateras, Mentor Graphics Ensuring safety and reliability of automotive ICs takes a full life-cycle view of automotive test…

Dr. Wally Rhines talks about the business of test

Dr. Wally Rhines talks about the business of test

Dr. Wally Rhines, the chairman and CEO of Mentor Graphics is one of the most dynamic and engaging speakers in…

Best practice in scan pattern ordering for test and diagnosis

Best practice in scan pattern ordering for test and diagnosis

By Jay Jahangiri and Wu Yang, Mentor Graphics By creating and applying scan patterns in the right order, you can…

Expose Transistor-level Yield Limiters with Cell-aware Diagnosis

Expose Transistor-level Yield Limiters with Cell-aware Diagnosis

Improve yield and failure analysis by identifying defects inside standard cells. Learn more in this new whitepaper.

Transistor-Level Defect Diagnosis

Transistor-Level Defect Diagnosis

By Geir Eide, Mentor Graphics Need to diagnose silicon failures faster and with more accuracy? Try the new cell-aware diagnosis…

ISTFA 2016 – New tools and product demos – Tessent SiliconInsight

ISTFA 2016 – New tools and product demos – Tessent SiliconInsight

In this video – How Tessent SiliconInsight improves the silicon bring-up flow.