Dr. Wally Rhines, the chairman and CEO of Mentor Graphics is one of the most dynamic and engaging speakers in the semiconductor industry. He weaves lively narrative with powerful data and historical perspective to bring insight to a range of business and technology topics.
You can now view the plenary keynote address on the business of test that Rhines delivered at the 2016 International Test Conference (ITC). Video
The video is 50 minutes long, so grab some popcorn and settle in to hear Rhine’s explain how test is intertwined with semiconductor electronics. He reviews the evolution of test methods, which have been driven by necessity to reduce costs or improve IC quality. As late as 2003, as the cost of manufacturing a transistor was exponentially decreasing, the cost of testing each transistor was staying flat. The fear in the industry was that it would cost more to test a transistor than to manufacture it, which provided a warning that a serious innovation in test was needed, and soon. Of course, embedded test compression had been invented in 2001 and was adopted more slowly than expected because of the post-dot com bust and economic downturn that left ATE equipment idle across the world. Once the industry picked up again, test compression became a standard part of the test flow, and it improved over the years with continuous innovation. Test compression has kept up with Moore’s law scaling, even as both the number of transistors and the number of test pattern has grown.
Today’s IC test demands are driven by giga-gate designs, zero-defect requirements for automotive ICs, and the need for better failure diagnosis with FinFETs. What test strategies are emerging to meet these disruptive challenges? Watch Rhines discuss the new technologies in compression, hierarchical, hybrid scan/BIST setups, and diagnosis and yield analysis.