The five keys to next-generation IC packaging design: Part 2

Multi-domain integration enables faster time to market for complex advanced semiconductor packages with a seamless integration of design and verification.

3D IC design engineer using gloved hands to inspect and verify components

Front-end architectural verification considerations for 3D IC design

So far in our 3D IC blog series, we’ve discussed efforts to create chiplet ecosystems, design workflow changes needed to…

The Five Keys to Next-Generation IC Packaging Design: Part 1

Part 1: An advanced IC packaging design and verification solution For many applications, next generation IC packaging is the best…

Megatrends of advanced IC packaging solutions 

Over last 2-3 years, everyone has been talking about Moore’s “Law” becoming invalid. Even if it does, we will continue…

IESF 2022

Learn about heterogeneous integration of semiconductors for autonomous driving, electric vehicle, and ADAS systems at the IESF 2022 automotive conference

IESF Automotive began 22 years ago and has been a must-attend event for automotive E/E design experts and executives throughout…

3D IC and the system-technology co-optimization (STCO) approach

3D IC and the system-technology co-optimization (STCO) approach

Semiconductor engineers aim to deliver best-in-class devices despite technology scaling and cost limitations of monolithic integrated circuit (IC) design. To…

What’s the current state of 3D IC design?

In the first podcast about 3D IC heterogeneous integration, we talked about the disaggregation of once monolithic implementation architectures into…

The beginner’s guide to 3D IC

The beginner’s guide to 3D IC

As consumer electronic devices grow increasingly connected, intelligent and advanced, designers need new methodologies such as 3D IC to address…