Featured

Filter by:
Illustration of 3D IC stacked design

3D IC technology: your comprehensive guide to enabling heterogeneous integration

May 19, 2025

What is 3D IC technology? 3D IC technology refers to the integration of multiple silicon dies or wafers in a…

By John McMillan
14 MIN READ
Screen shots of Innovator3D IC software in use.

Exploring TSMC InFO_oS and InFO_PoP certification

February 28, 2025

Siemens EDA has recently achieved this certification for Xpedition Package Designer as part of the TSMC InFO_oS and InFO_PoP workflows.

By Keith Felton
2 MIN READ
Text that says what's new in IC Packaging 2409 next to a stylized X

What’s new in IC Packaging 2409

September 19, 2024

The 2409 release is a landmark update in the field of electronic design automation (EDA), introducing a next-generation solution for…

By Keith Felton
3 MIN READ

Siemens introduces Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

July 31, 2024

Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

By John McMillan
4 MIN READ
Image showing physical design IP reuse with Xpedition Package designer

Embracing physical design IP reuse as a best practice

July 22, 2024

Efficiency in IC package design is becoming more important as design cycles shorten and complexity surges. One common approach to…

By Keith Felton
2 MIN READ
New innovative way to functionally verify heterogeneous 2D/3D package connectivity

New innovative way to functionally verify heterogeneous 2D/3D package connectivity

June 6, 2024

This blog introduces a white paper that addresses the challenges of verifying
package connectivity and illustrated how to use formal tools to verify connectivity for package designs.

By John McMillan and Todd Burkholder
3 MIN READ
Two people working at a white board with text onscreen that says: Multiplying engineering resources for efficient package substrate design

Multiplying engineering resources for efficient package substrate design

May 14, 2024

In the world of package substrate design, the age-old saying, “many hands make light work,” holds more truth than ever….

By Keith Felton
2 MIN READ
Image of a chip with text that says: High Bandwidth Memory integration

Managing the complexities of High Bandwidth Memory integration in high-performance computing

March 12, 2024

The utilization of High Bandwidth Memory (HBM) has become a cornerstone for high performance computing (HPC) CPUs, GPUs, and AI…

By Keith Felton
2 MIN READ
Taking 2.5D/3D IC physical verification to the next level

Taking 2.5D/3D IC physical verification to the next level

February 21, 2024

Taking 2.5D/3D IC physical verification to the next level. As package designs continue to evolve, so must the verification requirements. Designers working on even the most complex multi-die, multi-chiplet stacked configurations require enhanced checking capabilities to quickly and easily verify that the physical die are placed correctly to ensure proper connectivity and electrical behavior.

By John McMillan
4 MIN READ