3D IC hardware security: a designer’s checklist

Guest author: Chris Jones, Director Of Applications at Crypto Quantique. 

In the rapidly evolving world of semiconductor design, 3D integrated circuits represent a monumental leap forward. By stacking multiple active device layers or chiplets vertically, 3D ICs promise unprecedented performance, reduced power consumption and smaller form factors. They are the building blocks of the next generation of high-performance computing, AI accelerators and advanced embedded systems. But with great innovation comes great responsibility, especially when it comes to security.

The intricate architecture of 3D ICs introduces a new frontier of hardware security challenges. From inter-die communication vulnerabilities to the complexities of supply chain integrity across multiple chiplets, traditional approaches to security are no longer sufficient. We’re moving beyond simple 2D threats into a multi-dimensional security landscape.

This is precisely why the insights from experts like Chris Jones of Crypto Quantique are so critical. In a recent podcast discussion, Jones shed light on the urgent need for a proactive, security-first approach in 3D IC design. His message is clear: security cannot be an afterthought; it must be ingrained from the very beginning.

Want to hear the full conversation? Listen to Chris Jones’s complete insights on hardware security in 3D ICs in the podcast episode, “Zero trust in silicon: The new security imperative for chiplet-based 3D ICs”.

The designer’s checklist: security by design

What follows is a practical distillation of his most impactful advice: a designer’s checklist to navigate the complexities of 3D IC hardware security.

1. Ask security questions early and often

One of the most fundamental shifts Chris Jones advocates for is integrating security considerations from the absolute outset of the design process. Too often, security is treated as a bolt-on feature, an afterthought to be addressed late in the development cycle. In the context of 3D ICs, this reactive approach is a recipe for disaster.

Why it matters: With heterogeneous integration of different chiplets and complex inter-die communication pathways, vulnerabilities can emerge at multiple layers and interfaces. A security flaw in one chiplet or in the communication fabric between them can compromise the entire system. Identifying these potential weaknesses early allows for architectural changes that are far less costly than trying to patch them later.

Practical steps:

• Conduct threat modeling before writing a single line of RTL. Identify potential adversaries, their motivations and capabilities. Consider unique attack surfaces introduced by vertical integration, such as side-channel attacks across stacked dies or vulnerabilities in through-silicon vias.
• Treat security requirements with the same priority as performance, power and area targets. Define clear, measurable security objectives including secure boot across chiplets, authenticated inter-die communication and robust isolation mechanisms.
• Foster continuous dialogue between design, verification and security teams, and implement security checks as early as possible in the design flow.

2. Embrace and follow NIST standards

In the complex landscape of hardware security, established frameworks like those from the National Institute of Standards and Technology have become invaluable. Chris Jones emphasizes that instead of trying to invent new security platforms, designers should leverage and adhere to these globally recognized standards.

Why it matters: NIST standards offer a comprehensive, vendor-neutral approach to cybersecurity and hardware security. For 3D ICs, where supply chain security and the integration of diverse components are paramount, following a common framework ensures a baseline level of security and interoperability.

Practical steps:

• Familiarize yourself with relevant NIST Special Publications like SP 800-193 and the broader Cybersecurity Framework. Apply NIST’s Risk Management Framework to your 3D IC projects to identify, assess and mitigate risks throughout the product lifecycle.
• Integrate secure development lifecycle practices into your design flow, including security training, static and dynamic analysis, penetration testing and continuous monitoring.
• When cryptographic functions are required, always opt for algorithms and implementations validated against NIST standard.

3. Avoid proprietary cryptography

One of the most critical pieces of advice Chris Jones offers is a stark warning against the use of proprietary or homegrown cryptographic algorithms. While the temptation might be to develop a unique encryption scheme for perceived added security, this approach almost invariably leads to weaker, more vulnerable systems.

Why it matters: The security of a 3D IC often hinges on the strength of its cryptographic foundations. Introducing unproven, proprietary cryptography creates unnecessary and significant risks. Attackers thrive on obscurity; given enough time and resources, they will likely find flaws in unvetted algorithms.

Practical steps:

• Always use cryptographic algorithms that have been openly published, rigorously analyzed by the global cryptographic community and standardized by reputable bodies like NIST. Algorithms such as AES, SHA-2/3 and ECC have withstood years public scrutiny.
• Recognize that attempting to hide the details of a cryptographic algorithm does not make it more secure. True security comes from the mathematical strength of the algorithm, the length of the keys and the correctness of its implementation.
• Focus on correct implementation using validated cryptographic libraries and thorough security reviews. If there’s a specific security requirement that seems to defy standard solutions, consult with professional cryptographers.

4. Appoint a security champion on every team

Even with the best standards and intentions, security can sometimes get lost in the day-to-day pressures of design and development. This is why Chris Jones advocates for a dedicated role: a security champion within every design team.

Why it matters for 3D ICs: The multidisciplinary nature of 3D IC design, often involving multiple teams and IP blocks from various sources, makes it easy for security concerns to fall through the cracks. A security champion provides a crucial focal point, bridging the gap between high-level security policies and the practical realities of implementation.

Practical steps:

• Define the security champion role clearly. This person serves as a point person for staying updated on security threats, advocating for security requirements, facilitating threat modeling sessions and acting as a liaison between the design team and central security teams.
• Equip security champions with necessary training, access to standards like NIST and direct lines to security architects. Management must empower security champions to challenge design decisions that compromise security.
• Ensure the security champion is involved in key design phases from concept to validation, with their input as a mandatory part of design reviews.

Cultivating a security mindset

True hardware security in the 3D IC era extends beyond ticking boxes. It requires a fundamental shift in mindset- one that views security not as a hurdle, but as an integral component of quality, reliability and market success. The threats are constantly evolving, and so too must our vigilance and commitment to secure design.

By proactively asking security questions, adhering to robust standards like NIST, steering clear of proprietary cryptography and empowering dedicated security champions, designers can build secure, resilient 3D ICs that meet the demand of tomorrow’s interconnected world.