Why DFT Verification Signoff Is the Hidden Risk Threatening Your Next Tapeout

The Stakes Have Never Been Higher Today’s chips integrate billions of transistors, dozens of IP blocks, and deeply hierarchical architectures, all…

DVCon US 2026 Keynote Verification Convergence

DVCon US Keynote: Why Verification Must Evolve in the Convergence Era

At DVCon US 2026, a keynote delivered by three speakers—Abhi Kolpekwar (Siemens EDA), Jean-Marie Brunet (Siemens EDA), and Alon Shtepel…

First-Silicon Success

Why First-Silicon Success Is Getting Harder for System Companies

First-silicon success is getting harder.

Everyone wants their own chip. Few are hitting first-silicon success.

That’s the paradox shaping today’s semiconductor landscape.

In the 2024 Siemens EDA / Wilson Research Group Functional Verification Study, which I authored, we found that only 14% of ASIC/SoC projects achieved first-silicon success — the lowest figure in more than twenty years of tracking this data.

First-Silicon Success

Generative AI: The Hype, The Hope, The Hard Truths — And the Debate at DAC

The semiconductor industry is no stranger to bold claims. But few topics today spark more debate — or more genuine…

Questa One DFT Verification

DFT Verification: Tackling the evolving challenges

Technological advancement continues as a blistering pace, and the demand for highly reliable systems is paramount across various industries. Safety…