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Product: Visualizer

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Industrial-Grade AI in EDA: From Promise to Practice — A Siemens Panel at DAC 2025

June 17, 2025

Industrial-Grade AI in EDA

By Harry Foster
2 MIN READ
Simulation is Key in design verification process

The importance of simulation in the pursuit of absolute speed!

April 2, 2024

A casual conversation with an ex-insider of the high frequency trading sector reveals surprising details about simulation and their design-verification process

By Sunil Sahoo
3 MIN READ

UVM Objections at DVCON US 2024 – and Grape Jelly

February 22, 2024

Boiling Grape Jelly Stay with me – trust me. There’s a tie in to UVM Objections and DVCON US 2024….

By Rich Edelman
3 MIN READ
UVM Debug? Just nature doing what it does

Bent Tools and other Horrors From the Garden and UVM Debug – or Are You Still Debugging with $display?

May 24, 2023

I can’t take credit for the great flowers in the garden. It’s the tremendous rain we’ve had in California this…

By Rich Edelman
4 MIN READ
My Day At The Beach - Early

UVM Testbench Debug – A Day At The Beach – Right?

October 4, 2022

Some people think UVM Testbench Debug is a drag. But really, it depends. I think it’s a day at the…

By Rich Edelman
4 MIN READ