The 2026 Functional Verification Study: Evidence of a New Verification Operating State

We have released the results of the 2026 Siemens EDA and Wilson Research Group Functional Verification Study.

In previous years, we published separate IC/ASIC and FPGA reports. For 2026, we expanded that approach into a broader research collection: four focused whitepapers, a methodology reference paper, and a Functional Verification Data Atlas containing the supporting findings and historical trends.

There is a lot of data in this year’s study. But one result is difficult to ignore.

First-silicon success has fallen sharply

Among IC/ASIC respondents, only 5% reported first-silicon success in 2026, compared with 14.4% in 2024.

The broader spin distribution reinforces the same pattern, with the overwhelming majority of respondents reporting multiple spins before production.

That naturally raises a question:

Why?

It is tempting to look for a single explanation—a shortage of verification engineers, inadequate methodologies, schedule pressure, increasing design size, or insufficient automation.

I don’t think the data supports such a simple conclusion.

Instead, one of the larger messages emerging from the 2026 study is that complexity itself has changed.

We are no longer verifying the same kinds of systems

The 2026 findings show a verification environment that is increasingly dominated by processor-rich, acceleration-class systems with embedded software and expanding safety, security, and other assurance requirements.

These are not simply larger RTL designs.

The nature of complexity has changed.

Today’s systems are increasingly software-driven, heterogeneous, and interconnected, with more interactions across traditional functional boundaries.

That distinction matters.

The failure surface has expanded

Logic and functional errors remain important and continue to be a major contributor to ASIC respins.

But the 2026 results also show reported contributions from firmware, safety, security, power, clocking, timing, and other system-level concerns.

The FPGA results tell a similar story. Traditional logic and functional flaws remain prominent, but they are part of a broader set of potential contributors to non-trivial production escapes.

This is one reason I believe we need to be careful when interpreting first-silicon success.

The question may no longer be simply:

“Are we doing traditional functional verification well enough?”

A better question may be:

“Has the scope of what must be verified expanded faster than our traditional definition of verification?”

Verification boundaries are becoming less distinct

The study contains several signals that traditionally separate engineering concerns are becoming more closely connected.

DFT, for example, is increasingly connected with the broader functional verification environment.

Safety and security are becoming more intertwined.

And AI/ML is beginning to change how verification work itself is performed—from test generation and coverage analysis to debug, regression optimization, and formal verification.

I won’t reproduce all of those findings here. They are explored in detail throughout the research collection.

Taken together, however, they point toward something larger than simple growth in design size:

the nature of the verification problem itself is changing.

A new operating state?

One of the papers in this year’s research collection, Five Signals from the 2026 Functional Verification Study, asks whether first-silicon success has entered a new operating state.

That wording is intentional.

The study does not establish that processor content, AI acceleration, safety, security, DFT integration, or any other individual factor causes lower first-silicon success.

What the study does show is that several characteristics of the verification environment are changing simultaneously.

That makes the decline in first-silicon success more than an isolated metric worth watching.

It may be a signal that the assumptions we have historically used to think about functional verification need to evolve as well.

Exploring the 2026 findings

To make the research easier to explore—and to separate the underlying data from its interpretation—we have published the 2026 study in several forms.

If someone asked me where to start, I would recommend Five Signals from the 2026 Functional Verification Study.

The Executive Findings provides the broadest view of the research, while Five Signals offers the clearest interpretive lens for understanding what I believe is the central story of this year’s study: complexity has changed.

It uses the decline in first-silicon success as a starting point and then examines several independent signals suggesting that the verification environment itself may have entered a different operating state.

The Functional Verification Data Atlas provides the supporting charts, historical trends, survey bases, nonresponse information, and qualifications behind the published findings.

The Methodology Reference Paper documents how the study was conducted and explains the recruitment-methodology transition between the historical 2007–2022 studies and the current 2024–2026 study period.

And four focused whitepapers explore different implications of the research in greater depth.

Link: 2026 Functional Verification Study publication collection

Over the coming weeks, I plan to use this blog to examine several of these findings individually—including first-silicon success, changes in system complexity, the expanding relationship between DFT and functional verification, and the rapidly developing role of AI/ML in verification workflows.

There is no shortage of interesting data.

But if I had to summarize the 2026 study in one sentence, it would be this:

Complexity has changed—and the way we measure, organize, and think about verification needs to change with it.