Thought Leadership

Why First-Silicon Success Is Getting Harder for System Companies

Everyone wants their own chip. Few are hitting first-silicon success.

That’s the paradox shaping today’s semiconductor landscape.

In the 2024 Siemens EDA / Wilson Research Group Functional Verification Study, which I authored, we found that only 14% of ASIC/SoC projects achieved first-silicon success — the lowest figure in more than twenty years of tracking this data.

The decline is industry-wide, but it’s especially pronounced among system companies: automotive OEMs, hyperscalers, and consumer brands that once purchased chips are now designing their own. The logic is sound — custom silicon promises differentiation, control over performance, and tighter vertical integration. But the results highlight a hard truth: designing chips is far more unforgiving than many anticipated.

The Experience Gap

Chip design is not just about brilliant engineers; it’s about accumulated knowledge. Traditional semiconductor firms spent decades building “muscle memory” around flows, sign-off criteria, and coverage closure. They know from experience which corner cases sink projects and how to structure verification to catch them.

System companies, despite hiring top technical talent, are starting without that playbook. Even small oversights in methodology can lead to multimillion-dollar respins. And at today’s advanced nodes, a single respin can wipe out an entire product cycle.

Cultural Clashes

Software-first organizations often thrive on iteration. The mantra of “ship fast, patch later” has worked well in the app or cloud world. But silicon is different. At 3nm, a mask set costs tens of millions of dollars. Launch schedules are tightly coupled to vehicles, phones, and data centers. There is no “patch later” when the product is hardware.

This cultural adjustment — from moving fast to verifying relentlessly — is proving more challenging than many system companies expected.

Verification Reality

Our study data continues to underline a consistent truth: 60–70% of engineering effort in chip projects belongs in verification. Traditional chipmakers have internalized this, pouring resources into testbenches, emulation, and coverage analysis.

By contrast, many system companies underestimate verification at the outset. They view it as overhead rather than the lifeblood of silicon success. The result is predictable: bugs escape pre-silicon, only to surface in the lab. That gap is one of the biggest contributors to today’s lower first-silicon success rates.

Safety and Standards Pressure

For automotive OEMs, the challenge is even steeper. Standards such as ISO 26262 demand safety mechanisms, redundancy, fault injection handling, and comprehensive corner-case analysis. These requirements dramatically expand the verification state space — at precisely the time when organizations are still climbing the silicon learning curve.

The complexity of meeting safety standards cannot be overstated. It turns out that designing a chip is one thing, but designing a chip that passes rigorous functional safety requirements is another challenge entirely.

The Bigger Picture

Of course, it isn’t just about new players. Even seasoned semiconductor firms are under pressure. Advanced packaging, chiplet-based integration, EUV lithography variability, power integrity, and high-speed protocol complexity have all contributed to the industry-wide decline in first-silicon success.

But system companies amplify the effect. They are learning these lessons in real time, at the very moment when the economics of failure are harsher than ever.

Closing the Gap

The democratization of silicon design is a positive trend. It encourages innovation, enables differentiation, and creates opportunities for industries that once relied on off-the-shelf components.

But custom silicon is unforgiving. To succeed, companies must combine strong design talent with organizational maturity, disciplined verification methodologies, and respect for the economic impact of a respin.

This is exactly why Siemens is investing in solutions like Questa One — to unify and accelerate verification — and why we created the Verification Academy — to help build the skills our industry desperately needs.

The data is clear: first-silicon success is harder than it looks. But with the right tools and the right skills, it’s absolutely achievable.

Harry Foster
Chief Scientist Verification

Harry Foster is Chief Scientist Verification for Siemens Digital Industries Software; and is the Co-Founder and Executive Editor for the Verification Academy. Harry served as the 2021 Design Automation Conference General Chair, and is currently serving as a Past Chair. Harry is the recipient of the Accellera Technical Excellence Award for his contributions to developing industry standards. In addition, Harry is the recipient of the 2022 ACM Distinguished Service Award, and the 2022 IEEE CEDA Outstanding Service Award.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/verificationhorizons/2025/09/03/why-first-silicon-success-is-getting-harder-for-system-companies/