Accellera’s OVM: Omnimodus Verification Methodology


The Accellera VIP-TSC makes the Early Adopter release of the Universal Verification Methodology (UVM) available.

While Accellera does not use the Latin word Omnimodus in place of the English word Universal, what Accellera does make available is for all practical intents and purposes just OVM.  In April 2010, we made available at an early version of UVM EA.  It has now been updated with Accellera’s version here.

Accellera VIP-TSC has toiled for about a year following the completion of the VIP Interoperability Recommended Practices, which allowed verification specialist to use their legacy VMM code in an OVM environment, to produce UVM 1.0 EA.  EA stands for Early Adopter to signify a release intended for wider community testing before further additions and changes are made, which will then to be followed by formal Accellera standards approval and release of the official UVM 1.0 standard.

UVM EA Content

For OVM users, UVM 1.0 EA offers no substantive technical advances from OVM.  In changing “O’s” to “U’s” and “tlm’s” to “uvm_tlm’s” it has the promise, however, of wider public EDA vendor support.  It offers no compelling reason for current OVM users to move now.  For those who wish to test their code’s readiness to adopt UVM, we have tested the EA release with the most current version of Questa.  We also maintain our commitment to offer versions of the OVM Register Package and the OVM Sequence Layering solution for those who wish to experiment with native UVM.  Stay tuned for more information on that in the future.

UVM 1.0 Standard Proposed Content

The Accellera VIP-TSC now embarks on the hard task to address development of the official UVM 1.0 standard.  At its last technical committee meeting, it began to discuss how to start the process to identify requirements for the UVM 1.0 register package.  That feature, along with others currently on the committee’s list of features include the following:

Register Memory package
Non-interpreted field macros
TLM 2.0 Support
Hierarchical phasing
Strongly-typed factory
Pre-defined run-time phases
Auto-documentation of configuration options
Virtual interface connection
Configuration randomization
Test concatenation
RTL configuration

I will share ongoing progress towards the official UVM 1.0 release as developments merit.

Getting Started with UVM EA

You can download UVM from OVM World contributions area where other OVM contributions are being readied for UVM.  Your feedback is always welcome.

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