Message-based connections enable system-level debug and validation

Secure Message Infrastructure is a scalable, message-based on-chip communications fabric that facilitates system-level debug and validation by allowing configuration of on-chip Embedded Analytics IP, cross-triggering and data capture

A new way of measuring heterogeneous SoC performance

Explore a new way to measure heterogenous SoC performance at the Linley Fall Processor Conference

Join Siemens at the Linley Fall Processor Conference, the two-day event focusing on processors and IP cores used in embedded, communications, automotive, IoT,
and server designs.

D&R IP-SoC Day 2022 Silicon Valley

Siemens EDA talks cybersecurity at IP-SoC Silicon Valley

The Tessent group participated in the “unique event fully dedicated to IP and IP-based electronic systems,” D&R IP-SoC Silicon Valley…

Join Siemens EDA at GOMACTech 2022

Where design and innovation meets tomorrow Siemens EDA is looking forward to exhibiting a broad array of technologies spanning from…

For secure chips, use high-quality test and embedded analytics

There is growing concern over the security of ICs used not just in aerospace and military devices, but also in…

Watch videos from the AI Hardware Summit 2021

The AI Hardware Summit wrapped up on 15 September, 2021 at the Computer History Museum in Mountain View, CA. The…

Automotive electronics solutions at AESIN Conference 2021

A successful Automotive Electronics Innovation (AESIN) conference at the UK’s National Motorcycle Museum in Solihull wrapped up on 16 September…

Tessent at 2021 Automotive Electronics Innovation (AESIN) Conference

Siemens is a headline sponsor of the 2021 Automotive Electronics Innovation (AESIN) Conference taking place at the UK’s National Motorcycle…

Tessent at the 2021 AI Hardware Summit

Don’t miss the AI Hardware Summit from September 13-16, 2021. The summit is THE place for those acceleratingAI workloads in…