Designing the next generation of AI chips Part 2

By Spencer Acain

As AI grows increasingly integrated with modern products, finding a way to quickly and efficiently design purpose-built AI accelerators for a wide range of applications is vitally important. Designing chips using High-Level Synthesis (HLS) not only allows for aggressive optimization of power usage and performance but the possibility of integrating AI itself into the design process for even greater gains. As the design process becomes increasingly interdisciplinary, HLS also offers a path to integrating electronics into MBSE workflows.

In this episode of AI Spectrum, Spencer Acain is once again joined by Russell Klein, program director at Siemens EDA and a member of the Catapult HLS team to discuss the benefits of HLS and the ways it will integrate with AI in the future.

In this episode you will learn:

  • HLS-designed accelerators vs. general purpose accelerators (00:30)
  • How HLS compares to manual optimization (03:18)
  • How AI improves on optimization heuristics (07:27)
  • Integrating chips into the MBSE process (11:39)
Russell Klein

Russell Klein

Program Director at Siemens EDA and part of the Catapult HLS team

Spencer Acain

Spencer Acain

Technical Writer for Global Marketing at Siemens Digital Industries Software

AI Spectrum Podcast

AI Spectrum

This podcast features discussions around the importance of AI and ML in today’s industrial world.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/podcasts/ai-spectrum/designing-the-next-generation-of-ai-chips-part-2/