Discover a smarter approach to In-System Test verification at ITC 2026
In-System Test is rapidly becoming a critical capability for advanced silicon, enabling new approaches to manufacturing test, silicon health monitoring, lifecycle extension, and software-driven diagnostics. But as IST grows in importance, it also expands the verification problem. It is no longer enough to validate DFT structures in isolation. Teams now need to verify that test payloads move correctly across interfaces such as PCIe, USB, and AXI/APB, that Tessent IST infrastructure behaves as intended, and that embedded software can configure, control, and execute the full flow under realistic system conditions.
That combination of DFT, protocol, and software validation is exactly where many teams feel the pressure. In-System Test verification spans multiple use models and requires closer collaboration across DFT, functional verification, and software teams. At the same time, it raises the bar for protocol-aware debug, reusable infrastructure, and efficient hardware/software co-verification. Without a scalable methodology, teams often face too much custom environment work, limited visibility into end-to-end behavior, and integration issues that surface late in bring-up.
Siemens In-System Test Verification Solution
Siemens is addressing this challenge with a comprehensive methodology for In-System Test verification that connects Tessent implementation with Questa One and Veloce CS verification technologies in a scalable, phased flow. The Siemens approach spans the full IST verification journey, from early hardware validation through software-aware verification and system-level scalability. The combination of purpose-built Questa One DFT engines, Questa One Avery VIP protocol-aware technologies, and Veloce hardware acceleration and silicon test solutions help teams verify IST more efficiently across phases and increasing levels of system realism. The result is a more scalable path to bring-up, better reuse across the verification flow, and stronger confidence on the road to IST verification sign-off.
Join us at ITC 2026
At ITC 2026, Siemens will bring this methodology to life in a booth demo that shows how customers are enabled with a connected verification flow spanning early silicon validation to software-aware HW/SW co-verification and validation with a fully integrated Siemens solution. If you want to see how Siemens helps reduce complexity, accelerate ramp-up, and make IST verification more practical at scale, come check out the solution and demos at the Siemens booth at ITC 2026 in San Antonio.
