Thought Leadership

DVCon, Reuse, and Software-Driven Verification

By Matthew Ballance


I was fortunate to be able to attend DVCon this year. One of my favorite aspects of the DVCon show are the paper and poster sessions.  DVCon is a very hands-on show, with the focus being practical applications of new verification techniques. It’s great to be able to listen as industry experts present new techniques and approaches during the paper sessions that they have spent countless hours developing, and be able to interact in a more informal manner with the poster presenters. Once DVCon is over, the content of these papers maintains their value, and I frequently find myself revisiting papers from previous DVCon conferences.

I was happy to be at DVCon this year presenting a poster paper on software-driven hardware verification. Software-driven verification of hardware has been around for a very long time, of course. Going back to the era when systems were composed of discrete packages wired together on a board, running some amount of software on the processor has been a great way to verify that the components of the system have been correctly integrated. Today, as the interactions between software running on multiple processors and hardware IP become more and more complex, software-driven hardware verification continues to be relevant.

There are many challenges in software-driven hardware verification. Some challenges, such as automating creation of stimulus, are addressed by existing tools and are within the scope of the Accellera Portable Stimulus Working Group. Other challenges are more foundational, such as how test functionality is encapsulated and connected to maximize test-creation productivity, and maximize reuse of elements of test functionality. My paper, Jump-Start Software-Driven Hardware Verification with a Verification Framework, proposes a set of key features and capabilities required by a verification framework targeted at software-driven hardware verification.

Continuing the theme of reuse, I’m excited to announce that a collection of papers, poster papers, and interviews from DVCon are now available on Verification Academy. Whether or not you were able to attend DVCon, you can read papers on topics ranging from regression management to formal techniques to software-driven hardware verification. In addition, you can listen to the presenters of poster papers introduce their poster, and see interviews with industry figures. You can find these resources and more at the following link:

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This article first appeared on the Siemens Digital Industries Software blog at