In January 2010 we released the OVM 1.0 Register Package. It has now been updated to enhance capabilities and address issues raised by users. The updated contribution can be downloaded from OVM World.
The OVM 2.0 Register Package builds on 1.0 with new built-in register tests, easier cloning and copying of registers and register maps. The code has been ported to other implementations besides Questa.
A list of some of the new features for OVM 2.0 Register Package include:
- Added built-in tests
- register_alias – write one register, read all
- power_on_reset – read all registers, check against reset value
- walking_zeros – write walking zeros, read back, compare
- walking_ones – write walking ones, read back, compare
- write_read – do a write then a read
- Ported to other implementations
Certain SystemVerilog features and capabilities are re-implemented for other implementations. Those changes are wrapped with the appropriate `ifdef. You can run Questa with those turned on if you like.Due to the port, any function that returned a list had to be changed to return the list as an output argument to the function.
- Added UNPREDICTABLEMASK
- Added compare_read_only_bits for selective inclusion or exclusion of read-only bits in the compare
- Added mapped_register_container (replaces ovm_register_map_base)
You can now add a register file to another register file (in addition to all previous behavior)
- ‘resetvalue’ in register constructor is now deprecated