Join us at the TSMC 2024 NA OIP Ecosystem Forum
The TSMC 2024 North America OIP (Open Innovation Platform®) Ecosystem Forum is just around the corner, and Siemens EDA is excited to participate, showcasing cutting-edge design solutions that address the complex challenges of next-generation semiconductor design.
Event details:
- Date: September 25, 2024 (In-Person Event)
- Time: 9:30 AM – 6:00 PM
- Venue: Santa Clara Convention Center
- Online VOD Event: October 10, 2024
- (Website link will be available in October)
At this forum, you’ll get an inside look at the latest design methodologies and technologies that are pushing the boundaries of what’s possible in semiconductor design. Siemens EDA will be presenting papers that highlight our innovative solutions, particularly in areas such as 3D IC, high-performance computing (HPC), artificial intelligence/machine learning (AI/ML), and mobile applications.
Why attend the TSMC 2024 OIP Ecosystem Forum?
Explore advanced node design challenges: As the semiconductor industry moves towards A16, N2, and N3 processes, Siemens EDA is at the forefront of addressing these design challenges. Our design flows and methodologies ensure smoother transitions and optimized designs that support ultra-low power, high-performance systems.
Discover Siemens role in TSMC 3DFabric™ advancements: Siemens EDA tools are integral to TSMC’s 3DFabric™ technology, including chip stacking, InFO, CoWoS®, SoIC, and the new 3Dblox™ standard. These technologies are crucial for the development of HPC, AI/ML, and mobile applications. Learn how our solutions, such as Calibre and Xpedition, streamline the verification of 3DIC designs, ensuring accuracy and accelerating time-to-market.
Gain insights into specialty technologies for 5G, automotive, and IoT: Siemens is actively involved in designing solutions for the growing needs of 5G, automotive, and IoT applications. Our AI-assisted design flows enable optimized 2D and 3DIC designs for specialty technologies, including ultra-low power and ultra-low voltage systems.
Hear real-world success stories: In collaboration with Microsoft, Siemens EDA tools were instrumental in the successful development of the MAIA AI processor, based on TSMC’s 5nm SoC and advanced 3DIC packaging technology. Siemens technologies played a pivotal role in verifying the complex connectivity and physical alignment of the package, interposer, and die assembly. The detailed case study will reveal how Siemens helped Microsoft meet the challenging tapeout deadlines by tackling complex power domains, cross-domain connectivity, and intricate verification tasks.
The full list of Siemens EDA Papers being presented at the Forum:
Automotive, IoT, & RF Track
| 11:30 -11:50 | Groundbreaking SRAM Repair Toolset: Pre-integrated Siemens Tessent MBIST with eMemory’s NeoFuse OTP |
| Meng-Yi Wu, eMemory | |
| Siemens EDA | |
| 13:30 – 13:50 | A comprehensive IP validation methodology for Microsoft’s AI and high-performance compute chips |
| Martin Sanchez Jr., Siemens EDA | |
| Microsoft | |
| 14:10 – 14:30 | New approach that targets EM/IR hotspot analysis and fixing with mPower and Calibre DesignEnhancer |
| Joseph Davis, Sr. Director of Product Management, Siemens EDA | |
| Online Only | Low-Power Communication IC Design Verified by AI-Powered Simulation Flow |
| Tomohiro Ishida, Siemens EDA | |
| Thine Electronics | |
| Online Only | A library-focused approach to standard cell IP evaluation and selection for automotive ICs |
| Aravind Radhakrishnan Nair, Siemens EDA | |
| Infineon Technologies |
HPC & Mobile Track
| 13:30 -13:50 | Utilizing an AI-powered methodology to achieve SPICE-accurate 7-sigma statistical yield verification |
| Mohamed Atoua, Siemens EDA | |
| NVIDIA | |
| 13:50 – 14:10 | EDA Flow Cloud Certification – a collaboration between TSMC, AWS and Siemens EDA |
| Christopher Clee, Siemens EDA | |
| AWS | |
| 14:50 – 15:10 | Advanced Verification of Microsoft MAIA AI Processor 3DIC |
| Mike Walsh, Siemens EDA | |
| Amit Kumar, Microsoft | |
| 15:30 – 15:50 | Secure remote debug with Siemens Calibre in Azure Modeling and Simulation Workbench |
| Microsoft | |
| Gaurav Deshpande, Siemens EDA | |
| 16:10 – 16:30 | Leveraging AI to accelerate debug with Calibre Design Solutions |
| David Abercrombie, Siemens EDA |
Join us!
Don’t miss this opportunity to stay ahead of the curve in semiconductor design. Join us at the TSMC 2024 NA OIP Ecosystem Forum to learn how Siemens EDA is driving innovation and delivering results across the semiconductor landscape. Whether you attend in person on September 25 or catch the online event on October 10, Siemens EDA will be ready to demonstrate how our solutions can accelerate your time-to-market and boost your design productivity.
We look forward to seeing there!
