3D IC Integration Challenges – ep. 6
A common challenge when actualizing new technologies such as 3D IC is the lack of specialized tools to mass assemble them. That’s because their designs are normally developed by R&D teams that view commercialization as someone else’s task. At the moment, organizations are working to create and perfect the tools need to assemble 3D IC chips.
Today, John McMillan interviews John Ferguson, Director of Product Management, Dusan Petranovic, Principal Technologist, and Steve McKinney, Account Technology Manager. They’ll help us understand what a 3D IC verification workflow might look like.
In this episode, you’ll learn about the challenges associated with 3D IC integration and the components required to make it possible. You’ll also learn about the upgrades that must be made to make 3D IC assembly possible. Additionally, you’ll hear about parasitic extraction and the tools available to execute it.
What You Will Learn In This Episode:
- Challenges faced in the manufacture of 3D IC chips (02:01)
- How to ensure that a 3D IC assembly line is aligned (04:18)
- The challenges of integrating 3D IC (10:55)
- The tools needed to make 3D IC integration possible (13:56)
Principal Technologist, Siemens Digital Industries Software
Connect with Dusan on LinkedIn
Director of Product Management at Siemens Digital Industries Software
SI/PI/EM Analysis & Verification Technologist, Siemens Digital Industries Software
Industry Analyst, Marketing and Technical Relationship Management Professional, Siemens Digital Industries Software
Three-dimensional integrated circuits take less space and deliver higher performance.