Mathilde Karsenti
Cornell University: Building Sparse Linear Algebra Accelerators with HLS

Cornell University: Building Sparse Linear Algebra Accelerators with HLS

October 14, 2022
Sparse linear algebra (SLA) operations are essential in many applications such as data analytics, graph processing, machine learning, and scientific...
By Mathilde Karsenti
< 1 MIN READ
Customers Share Their Experiences Using High-Level Synthesis

Customers Share Their Experiences Using High-Level Synthesis

May 13, 2022
High-Level Synthesis (HLS) has never been more in demand for chip design. In fact, it could be said that the...
By Mathilde Karsenti
< 1 MIN READ
Power: Front & Center of the Silicon Design Process

Power: Front & Center of the Silicon Design Process

April 7, 2022
Power is one of the most critical design metrics today, but it still is an afterthought in far too many...
By Mathilde Karsenti
< 1 MIN READ
Stanford University: Edge Machine Learning DNN Accelerator SoC Design Using Catapult HLS | Webinar

Stanford University: Edge Machine Learning DNN Accelerator SoC Design Using Catapult HLS | Webinar

September 3, 2021
This webinar describes the Edge Machine Learning Accelerator SoC design and verification of the systolic array-based DNN accelerator taped out by Stanford, the performance optimizations of the...
By Mathilde Karsenti
< 1 MIN READ
Welcome to: HLS Design & Verification Blog

Welcome to: HLS Design & Verification Blog

September 3, 2021
This blog will cover next generation High-Level Synthesis (HLS) design and verification methodologies and techniques. Actual users will be talking...
By Mathilde Karsenti
< 1 MIN READ
AI/ML Accelerator Tutorial: C-level Design & Verification Using HLS | Virtual Seminar

AI/ML Accelerator Tutorial: C-level Design & Verification Using HLS | Virtual Seminar

June 17, 2021
Catapult HLS (High-Level Synthesis) and C-level design and verification are reducing entire project development times by half or more in...
By Mathilde Karsenti
< 1 MIN READ
Advanced Synthesis for NanoXplore FPGAs | Webinar

Advanced Synthesis for NanoXplore FPGAs | Webinar

May 18, 2021
Many space and mil-aero applications require the use of specialized FPGAs with built-in protection from single event upsets. NanoXplore introduces...
By Mathilde Karsenti
< 1 MIN READ
Conversion from Vivado High-Level Synthesis (HLS) to Catapult HLS

Conversion from Vivado High-Level Synthesis (HLS) to Catapult HLS

March 6, 2021
In this blog post, we explore the key points which are required to convert an algorithm developed for Vivado HLS...
By Mathilde Karsenti
< 1 MIN READ
SemiEngineering: Designing Low Energy Chips And Systems

SemiEngineering: Designing Low Energy Chips And Systems

February 1, 2021
Excerpt from article: “Designing Low Energy Chips And Systems“ The lifecycle energy requirements of anything, such as a server or...
By Mathilde Karsenti
< 1 MIN READ
SemiEngineering: Hidden Costs In Faster, Low-Power AI Systems

SemiEngineering: Hidden Costs In Faster, Low-Power AI Systems

January 20, 2021
Excerpt from article: “Hidden Costs In Faster, Low-Power AI Systems” Rising design costsAnother piece of this puzzle involves the element...
By Mathilde Karsenti
< 1 MIN READ
SemiEngineering: Low Power Still Leads, But Energy Emerges As Future Focus

SemiEngineering: Low Power Still Leads, But Energy Emerges As Future Focus

December 10, 2020
Excerpt from article: “Low Power Still Leads, But Energy Emerges As Future Focus“ Across the board, power is now tipping...
By Mathilde Karsenti
< 1 MIN READ
SemiEngineering: Raising The Abstraction Level For Power

SemiEngineering: Raising The Abstraction Level For Power

May 9, 2019
Excerpt from article: “Raising The Abstraction Level For Power“ Early analysis can lead to the largest gains. “Certainly, higher abstraction provides more...
By Mathilde Karsenti
< 1 MIN READ