Article Roundup: Siemens Launches PAVE360 Pre-silicon Autonomous Validation Environment

Article Roundup: Siemens Launches PAVE360 Pre-silicon Autonomous Validation Environment

On May 15 Siemens announced a new pre-silicon autonomous validation environment called PAVE360. PAVE360 provides a comprehensive environment for multi-supplier…

Article Roundup: EDA in AI, Verifying Vehicle E/E Systems, High-Speed PCB Signal Integrity, Designing for the Edge & Digitalization for Electronics Manufacturers

Article Roundup: EDA in AI, Verifying Vehicle E/E Systems, High-Speed PCB Signal Integrity, Designing for the Edge & Digitalization for Electronics Manufacturers

The Role Of EDA In AI Achieving Effective Verification and Validation of Vehicle E/E Systems – Part 4 Signal Integrity…

MENTOR AT DAC 2019

MENTOR AT DAC 2019

The Design Automation Conference (DAC) is the premier conference for automated electronics design and verification technology. For 2019, DAC returns…

Article Roundup: Low-Power Memory, How to Pick an Embedded Processor, DFT for AI, MindSphere Oddities & Optimizing in the Age of Safety and Security

Article Roundup: Low-Power Memory, How to Pick an Embedded Processor, DFT for AI, MindSphere Oddities & Optimizing in the Age of Safety and Security

Boost your DFT efficiency for AI silicon design Target: 50% Reduction In Memory Power What Processor Should I Use? Offbeat…

Article Roundup: Automotive Chip Compliance, Integrated IoT IC Design, IC/ASIC Design Trends, 5nm Collaboration & Cleaner Fireplaces

Article Roundup: Automotive Chip Compliance, Integrated IoT IC Design, IC/ASIC Design Trends, 5nm Collaboration & Cleaner Fireplaces

The Long And Detailed Road To Automotive Compliance Enabling IoT Design with Integrated MEMS/IC Co-Design and Verification The Weather Report:…

Article Roundup: Designer-Centric CFD Simulation, Smarter Verification, Managing DFT for AI Chips, a Global PCB Platform & Formal Verification

Article Roundup: Designer-Centric CFD Simulation, Smarter Verification, Managing DFT for AI Chips, a Global PCB Platform & Formal Verification

Speeding Up Electrical Vehicle Development With Designer-Centric Thermal And Electromagnetic Simulation And Analysis Verify Smarter, Not Harder How To Manage…

Article Roundup: Orlando’s Digital Twins, Verification & Validation of Vehicle E/E Systems, HLS + IP Accelerates Development, the Nuts and Bolts of Verification & Improving Chip Design

Article Roundup: Orlando’s Digital Twins, Verification & Validation of Vehicle E/E Systems, HLS + IP Accelerates Development, the Nuts and Bolts of Verification & Improving Chip Design

How Orlando’s Work With Digital Twins May Change How We Engineer Everything Achieving Effective Verification and Validation of Vehicle E/E…

Article Roundup: Chip Design for New Mobility, Emulation for AI/ML, FPGA Verification Trends, Optimizing Scan-Pattern Ordering & Voltage-Aware DRC

Article Roundup: Chip Design for New Mobility, Emulation for AI/ML, FPGA Verification Trends, Optimizing Scan-Pattern Ordering & Voltage-Aware DRC

Chip Design For The Age Of New Mobility Hardware Emulation Answers AI/ML Verification Needs Trends In FPGA Verification Effort And…

Article Roundup: HLS for AI, an Interview with Dr. Marta Rencz, Qualcomm Achieves Faster Signoff DRC Convergence, and Smart Manufacturing

Article Roundup: HLS for AI, an Interview with Dr. Marta Rencz, Qualcomm Achieves Faster Signoff DRC Convergence, and Smart Manufacturing

High-level synthesis for AI: Part One High-level synthesis for AI: Part Two Interview with Dr. Marta Rencz, Mentor Graphics How…