Running at 6GHz is actually kind of scary regardless, but especially so with your eyes closed. And I mean that…
It’s never too late to fix a design problem. Well, maybe if the product is shipping, that might be classified…
Parallel busses are a pain to implement. They really are. Sure, they are slower than blazing-fast SERDES busses, but they…
Interconnect loss modeling? Check. Signal conditioning modeling? Check. Ability to simulate multiple S-parameter models for things like connectors and packages…
“A man’s got to know his limitations” … true, and so does a digital bus. Clint Eastwood’s quote to conclude…
…It all depends on how fast you are trying to go. That’s really the name of the game with anything…
Yeah, I can totally see Homer Simpson designing his SERDES bus and getting frustrated by all the additional insertion loss…
The whole via simulation issue is admittedly complicated, and I think really boils down to whether the vias are single-ended…
This past week, HyperLynx took it’s first steps into cyberspace with the introduction of HyperLynx PI Virtual Labs! What is…
