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Tailor Your Approach to PCB Layout

Tailor Your Approach to PCB Layout

Why fumble around with a GUI that makes you search for settings and switches? Your time is valuable! With PADS…

DDR Design: Write leveling for better DQ timing

DDR Design: Write leveling for better DQ timing

So far, we’ve gone through the basics of the DDR Bus, and discussed some of the Signal Integrity and timing requirements of…

Are you meeting IC power demands for your design?

Are you meeting IC power demands for your design?

DC Drop Simulation is more than just being sure you have enough copper on the planes. You should also investigate…

Adding Automated EMC Analysis to PCB Layout

Adding Automated EMC Analysis to PCB Layout

Electromagnetic compatibility (EMC) compliance is a necessary condition for releasing products to market. National and international standards bodies define limits…

Receiver requirements in DDR design

Receiver requirements in DDR design

Once we have a topology for the data and address busses in mind or have them laid out on the…

7 Habits of Highly Efficient PCB Designers

7 Habits of Highly Efficient PCB Designers

Every step taken during the printed circuit board (PCB) design process is taken purposefully. PCB’s are essentially complex puzzles where…

Six reasons not to be intimidated by PCB design constraints

Six reasons not to be intimidated by PCB design constraints

As PCBs increase in complexity and density, a higher percentage of the design must be implemented with strict adherence to…

What causes undesirable SI in DDR designs?

What causes undesirable SI in DDR designs?

Continuing my blog series on DDR [Part 1 – Controlling DDR, Part 2 – Memory Bus Basics, Part 3 –…

3D Collision and Clearance Checking

3D Collision and Clearance Checking

In my last blog post, ECAD-MCAD co-design for First Pass Success, we reviewed how an efficient ECAD-MCAD co-design process can…