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Simulation debug capabilities of ATPG: A method to check the values simulated

ATPG’s goal is to create a set of patterns that achieves a given test coverage, where test coverage is the total percentage of testable faults the pattern set detects.

ATPG consists of two main steps: 1) generating patterns to get hard detection only and, 2) performing fault simulation on the generated pattern to determine if the target fault is hard detected or if other undetected faults are possibly detected. Tessent ATPG tools automate these two steps into a single operation or ATPG process. This ATPG process results in patterns you can then save with added tester-specific formatting, enabling a tester to load the pattern data into a chip’s scan cells and otherwise apply the patterns correctly.

The two most typical methods for pattern generation are random and deterministic. Tessent ATPG tool intelligently performs random pattern fault simulation and deterministic test generation on the target fault list. It can also fault simulate patterns from an external set and place those patterns detecting faults in a test set.

Tessent FastScan or Tessent TestKompress allows us to generate the loaded or scan-in value of a specific scan cell for all the patterns generated.

One can use Tessent shell commands to specify the scan cell output pins (ex: scan_flop1/Q) and perform good-machine simulation on the pattern set which will show the simulation values of the added pin.

This command is a valuable debugging aid, as it provides a way to check the values simulated for specific output pins of cells within the design. These Tessent shell commands help the user specify which pins to report and also specify the name of the file in which you want to place simulation values for the selected pins.

Typically, you use the good and fault simulation capabilities of the ATPG tool to grade existing hand- or ATPG-generated pattern sets. You can write a list of pin values that differ between the faulty and good machine using the Tessent shell commands.

Fault Simulation With Existing Patterns

The purpose of “fault” simulation is to determine the fault coverage of the current pattern source for the faults in the active fault list.

Good-machine Simulation With Existing Patterns

The purpose of “good” simulation is to verify the simulation model without adding any faults (fault-free) circuit.

For a detailed explanation of the usage of these commands with an example, check out the Knowledge Base Article:

How to find scan-in value of a scan cell for all the patterns (siemens.com)

Jack Zhamkochyan
NA Support Application Engineering Manager - Tessent

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/eda-support/2025/02/04/simulation-debug-capabilities-of-atpg-a-method-to-check-the-values-simulated/