Exploring production-proven AI-powered EDA solutions with Solido Design Environment

Note: If you’re interested in knowing more about Solido Design Environment, check out this executive video by Amit Gupta, VP…

Bridging the gap between semiconductor IP providers and integrators

Note: To learn more about Solido Crosscheck’s QA exchange deck, check out the whitepaper https://resources.sw.siemens.com/en-US/white-paper-the-qa-exchange-deck-in-solido-crosscheck-enables-an-ip-qualification. This whitepaper discusses how the…

‘SPICE up’ your Verification this holiday season!

Just as I wrapped up my fancy Thanksgiving cooking marathon, I couldn’t help but draw parallels between the meticulous artistry…

IP QA best practices

A few months ago, it was reported that Apple was beginning the development of their A19 Bionic SoC using a…

Next-generation RF, ESD and IO designs on display at TSMC 2023 OIP Ecosystem Forum

TSMC 2023 Open Innovation Platform® Ecosystem Forum is taking a world stage in North America, Europe, Taiwan, China, Israel and…

Discussing Custom IC Verification with Taiwan Semiconductor Community

Taiwan is an inspiration to many countries that aspire to build or expand their semiconductor ecosystem. Although a small nation,…

Mixed Reality needs Mixed Signal

Mixed Reality needs Mixed Signal

Empowering the Design and Verification of Mixed-Signal SoCs for Advanced Spatial Computing with Symphony Pro We are on the cusp…

World tour of CICV solutions continues to build semiconductor partnerships

Disruptions create difficult challenges, but it provides inspiration to create new solutions. Partnerships further accelerate the process by instilling confidence…

IP Validation @ U2U EU

Siemens EDAs user-to-user (U2U) Europe conference will take place in Munich, Germany on May 11th.  If you have not already…