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Inside Bengaluru’s semiconductor hub: Key highlights from the Solido Custom IC Forum 2026

On August 19, Bengaluru’s semiconductor design community came together for the Solido Custom IC Forum 2026. The energy throughout the day reflected the momentum of India’s chip design sector: collaborative, highly technical and focused on tackling real custom IC design and verification challenges.

Centered on the theme Transforming AI-powered innovation in custom IC design and verification, the forum brought together Solido users from industry-leading companies, including AnalogPort, GlobalFoundries, Google, Intel, Microchip, NXP Semiconductors, Qualcomm, Samsung R&D Institute India and STMicroelectronics, for an open technical platform to share real experiences, case studies and frontline insights into tackling aggressive tapeout schedules.

Below is an overview of the presentations, panel discussions and technical showcases featured throughout the event:

Industry keynote

Engineering the next generation of microcontrollers: Enabling safe, intelligent, and sustainable systems

Rajesh Narwal, Director, MCU Analog IP Design, at STMicroelectronics delivered an insightful opening talk outlining the technical realities of microcontroller analog IP development, focusing on how design teams navigate sub-micron physical variation, reliability margins and high-coverage verification.

Industry Keynote by Rajesh Narwal, Director of MCU Analog IP Design, STMicroelectronics

Industry panel discussion

Agentic custom IC design: Scaling expert insight through intelligent automation

A major highlight of the morning program, this panel brought together engineering leaders from Google, Micron, Qualcomm and NXP Semiconductors to examine the transition toward autonomous agents in EDA. The discussion explored how agentic workflows can take over complex, multi-corner verification tasks while augmenting engineering productivity.

Technical sessions and demos from the Solido product team

Throughout the day, the Solido Custom IC product management team delivered a comprehensive series of technical deep dives. The presentations detailed major product updates across the Solido portfolio, including the latest AI agents purpose-built for custom IC design and verification. Complementing the stage sessions, attendees explored a hands-on exhibit area featuring interactive demonstrations of our latest agentic workflows and displays of customer posters showcased at DAC 2026, offering an up-close look at the latest design methodologies using Solido tools.

Interactive poster session at Solido Custom IC Forum in Bengaluru
Interactive poster session at Solido Custom IC Forum in Bengaluru

Industry expert experience presentations

The technical backbone of the forum came from Solido users who presented case studies, benchmark results and real-world outcomes:

  • Qualcomm: Accelerating characterization methodology of large and complex analog IPs
  • Microchip: An optimized full-chip analog mixed-signal (AMS) verification approach for PVT calibration in FPGA systems
  • Qualcomm: Mastering high-impedance verification: A robust automated framework for complex analog/mixed-signal IPs
  • NXP Semiconductors: Variation aware 5GHz VCO design: Accelerating design and verification with Solido Design Environment
  • Samsung R&D Institute India: Advanced variation analysis of standard cells for yield optimization in subthreshold technologies using Solido Design Environment
  • AnalogPort: Accelerating analog verification with PVTMC verifier using Solido Design Environment Core
  • Intel: Comprehensive validation of clock/combinational cell glitches scenarios and multi-bit flip-flop scan-hold failures by Solido Design Environment
  • Google: PVT corner optimization and cell-level variation control for low-voltage timing signoff
  • Samsung R&D Institute India: Comprehensive validation of memory compilers with Solido Analytics
  • Intel: Solido AI/ML-based methodology for Liberty generation across design cycles for analog IP
  • GlobalFoundries: Design of IP qualification interface that streamlines crosscheck rule execution
  • NXP Semiconductors: Enabling reliable tapeouts using shift-left IP validation
  • Google: Stop fixing, start building: Correct-by-construction IP with Solido Crosscheck
Solido user presentation from Qualcomm
Solido user presentation from Samsung R&D Institute India
Solido user presentation from GlobalFoundries
Solido user presentation from Intel

Reflections from Bengaluru

The Solido Custom IC Forum 2026 made one thing clear: AI is having a measurable impact at every level of custom IC design, from speeding up core machine-learning-based engines to improving engineering productivity through autonomous agents. The same idea showed up again and again, from the keynote to the panel discussion to the user presentations.

To explore the tools and methodologies highlighted at the event, visit the Solido Custom IC Solutions web page.

Mamoona Ahmad

This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/cicv/2026/10/05/inside-bengalurus-semiconductor-hub-key-highlights-from-the-solido-custom-ic-forum-2026/