Eliminate post-layout bottlenecks. Solido Layout Analyzer uses AI to connect parasitics and layout-dependent effects directly to circuit performance.
Highlights from Solido Custom IC Forum 2026: AI-powered innovations, agentic EDA workflows and frontline custom chip design and verification
Siemens expands Saskatoon EDA hub, adding 100 jobs and 45,000 sq ft
Siemens EDA’s Mixed-Signal Visualizer simplifies AMS verification by tackling the debug bottleneck with intuitive, holistic views.
At DAC 2026, we announced self-verifying, long-running EDA AI agents for semiconductor and PCB design, in collaboration with NVIDIA.
Solido Custom IC Design team shares L-Edit tips: Flylines, Highlight Connected and Calibre Real Time for efficient layout.
STMicroelectronics achieved a 12X speedup in standard cell library verification using AI-powered Solido Library Verifier, here’s how they did it.
Discover how Solido Characterizer uses AI to deliver 7x faster library characterization — turning weeks of runtime into days without sacrificing accuracy.
The CICD team has launched Tool Tips! A YouTube series of short, practical walkthroughs for engineers working with S-Edit and L-Edit.
