Industry: Semiconductor Devices

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Siemens expands Saskatoon EDA R&D hub to meet rising global demand for AI chip design

August 19, 2026

Siemens expands Saskatoon EDA hub, adding 100 jobs and 45,000 sq ft

By Mamoona Ahmad
3 MIN READ

From complexity to clarity: Simplifying AMS verification with Mixed-Signal Visualizer

August 12, 2026

Siemens EDA’s Mixed-Signal Visualizer simplifies AMS verification by tackling the debug bottleneck with intuitive, holistic views.

By Neel Natekar and luong nguyen
2 MIN READ

Self-verifying, long-running EDA AI agents that engineers can trust

July 29, 2026

At DAC 2026, we announced self-verifying, long-running EDA AI agents for semiconductor and PCB design, in collaboration with NVIDIA.

By Emma-Jane Crozier
5 MIN READ

Maximizing the capabilities of Siemens’ L-Edit for Custom IC Layout

July 9, 2026

Solido Custom IC Design team shares L-Edit tips: Flylines, Highlight Connected and Calibre Real Time for efficient layout.

By John Peloso
2 MIN READ

How STMicroelectronics achieved faster standard cell library verification with AI-powered Solido Library Verifier solution

June 25, 2026

STMicroelectronics achieved a 12X speedup in standard cell library verification using AI-powered Solido Library Verifier, here’s how they did it.

By Neel Natekar
3 MIN READ

Library characterization takes too long – here’s how Solido Characterizer uses AI to change that

June 12, 2026

Discover how Solido Characterizer uses AI to deliver 7x faster library characterization — turning weeks of runtime into days without sacrificing accuracy.

By Emma-Jane Crozier
5 MIN READ

Introducing Custom IC Design Tool Tips: a new YouTube series for S-Edit and L-Edit users

June 5, 2026

The CICD team has launched Tool Tips! A YouTube series of short, practical walkthroughs for engineers working with S-Edit and L-Edit.

By Mamoona Ahmad
3 MIN READ

How NVIDIA is scaling Liberty verification for diverse IP using the Solido Characterization Suite

June 1, 2026

NVIDIA scales Liberty verification for diverse IP using Solido Characterization Suite, tackling challenges like diverse IP, consistency, and scalability for improved silicon quality.

By siddharth ravikumar
4 MIN READ

Chiplet Summit 2026: Solido Simulation Suite tackles the verification complexities of 3D IC design

May 29, 2026

Solido Simulation Suite excels at Chiplet Summit 2026, tackling 3D IC verification complexities with SPICE-level accuracy for chiplet workflows.

By Lih-Jen Hou
3 MIN READ