It’s okay to be pushy!

By Design With Calibre

By James Paris – Mentor, A Siemens Business

Get the full benefit of parallel design implementation by pushing block-level contextual violations from the chip level to the block owners. Even better? Automate the process.

Managing block-level contextual violations reported at the chip level is, frankly, a pain. While performing chip-level verification throughout the design implementation flow is a good idea (Oh, look! A block placement issue! Fix that now!), incomplete blocks that aren’t DRC-clean can create chip-level violations that end up causing a lot of frustration and delays in the debugging process.

Better idea? Push these promoted block violations into targeted blocks, instead. Now the block owners have useful, actionable information they can use to correct these violations within their blocks, and the chip-level debugging process is a lot cleaner and simpler.

In the early stages of design implementation, chip-level designers are looking for routing violations in that interface region where blocks abut in the design floorplan. This helps them find errors such as shifted block placements or overlapping blocks that they can easily and quickly fix. However, chip-level errors reported over a block core area, or contextual violations on multiple instances of a block, are chip-level errors that are really only useful to the block-level owners.

 “Pushing” these types of errors into the block level benefits both the chip-level and block-level designers. The Calibre platform offers an automated function for pushing RDB error markers into a target block’s routing region, changing their reporting level. This automated solution enables both chip-level and block-level design teams to have control over the reporting level for error markers, which improves their ability to work efficiently in a parallel design implementation flow.

Want more details about how you can implement this technique into your production flow? It’s all in our white paper, How to simultaneously manage chip and block-level physical violation reporting. Download your copy today and start pushing!

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This article first appeared on the Siemens Digital Industries Software blog at