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What is the winning formula for running library characterization on the cloud?

According to IDG’s 2020 Cloud Computing Study, 32% of IT budgets in organizations will be…

Thorough variation-aware verification: proving vital for modern power-efficient designs

Recently the Institute of Electrical and Electronics Engineers (IEEE) awarded STMicroelectronics the “IEEE Milestone for Multiple…

Can you hear me now (with 5G)?

Remember the guy from the Verizon commercial “Can you hear me now”? The guy travels…

Why did Siemens EDA acquire Fractal Technologies?

We are very excited to announce Siemens EDA’s acquisition of Fractal Technologies last week, adding Crossfire to the Solido portfolio of IP verification and…

Addressing the Post-Layout Simulation Bottleneck for Analog Verification

Analog and mixed-signal designs are pervasive throughout the technology landscape today. The rapid growth in…

Producing and verifying 7/5/3nm IP Liberty models: the building blocks for leading-edge HPC, ML/AI and 5G designs

The first 5nm production chips have already been launched, such as Apple’s A14 Bionic, Qualcomm’s…

Machine Learning Enabled High-Sigma Verification for Memory Design – Innovation to cure ‘Chip Memory Loss’

The Covid-19 pandemic has presented us with many challenges in this past year. Working from…

Aging Gracefully Doesn’t Always Work in ICs

I have some exciting news to share for the IC design community regarding the Silicon…

Introducing Analog Mixed-Signal Verification blog series

‘Cars Driving Chips or Chips Driving Cars‘ – an interesting keynote title at this year’s…