Thought Leadership

P1800-2023 Kick-Off Meeting

December 10, 2020 • 2 MIN READ
SystemVerilog
SystemVerilog
By Dave Rich

SystemVerilogIt’s been about a year since rumblings began about starting up the next revision of the SystemVerilog IEEE Std 1800. There are many good arguments for and against creating another revision as I wrote about a few months ago. There are still people sticking with Verilog because lack of consistent language support. Another revision has the potential to get tools to converge on implementations where they have deviated from the standard because of deficiencies in the standard. There is also the opportunity enhance the language to improve productivity

There will be an informational kick-off meeting of the P1800 Working group for the next revision of the standard on Thursday, December 17th from 8:00  to 9:30 am Pacific time to discuss these issues. The target for completion of the P1800 standard is 2023, which will be 6 years between revisions. Please contact the P1800 secretary Michiel Ligthart for WebEx details.

IEEE Standards AssociationThe P1800 Working Group is entity-based, which means that, except for the Dec 17 informational meeting, participants or the companies they represent must be members of the IEEE Standards Association. See this link for membership details.

Look forward to meeting you there.

Dave Rich

Dave Rich

Dave Rich is Verification Technologist at Mentor Graphics and is one of the authors of Mentor’s Advanced Verification Methodology cookbook. He began his career as a design and verification engineer in 1981 at Data General. In 1987, he joined Gateway Design Automation as one of the first application engineers to support Verilog-XL. At Gateway, he helped design many of the early features of the Verilog Hardware Description Language (HDL), and after Cadence acquired Gateway, helped prepare the Language Reference Manual (LRM) that would eventually be donated to the newly formed Open Verilog International. In 1995, he joined another Verilog simulation company, Frontline Design Automation as an AE manager and later as a Product Manager after it was acquired by Avant!. In 1998, he joined Ambit Design and worked as a consulting engineer for both synthesis and simulation products after it was acquired by Cadence. In 2000, he joined Co-Design Automation as Director of Application Engineering where the Superlog HDL was being developed that eventually became the basis of the Accellera SystemVerilog 3.0 standard. Co-Design Automation was acquired by Synopsys in 2002. Dave began work on numerous technical committees within Accellera and later the IEEE P1800 working group, which he continues today.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/verificationhorizons/2020/12/10/p1800-2023-kick-off-meeting/