As you may know, in addition to my duties here at Mentor, I’m also the General Chair of DVCon 2010. So it is with two hats on that I encourage you to check out the DVCon website.
With my “General Chair hat” on, I’d like to point out that we’ve actually expanded the conference to add an extra set of half-day tutorials on Monday afternoon, Feb. 22. That’s right! While other conferences are shrinking or disbanding altogether, DVCon is growing! You can see the full technical program on the DVCon site as well.
With my “Mentor hat” on, I draw your attention to Mentor’s half-day tutorial, “A Step-by-step Guide to Advanced Verification” on Tuesday afternoon, Feb. 23. In this tutorial, we’re going to walk you through all the steps of assembling a verification environment, from verification planning to partitioning and assembling your OVM environment at the block, subsystem and system levels. We’ll also show how to take advantage of our other advanced technologies within the OVM framework, like our inFact Intelligent Testbench Automation tool and Questa MVCs for protocol verification. We’ll also discuss low-power and clock-domain crossing verification, processor-based verification and emulation. This tutorial will walk through an actual example that you’ll be able to download and play with yourself after the conference.
So, don’t forget to register for DVCon. If you register before January 29, you’ll get a discount on your registration and also be eligible for the special $149 room rate at the DoubleTree.
I look forward to seeing you there!