Excerpt from article: “The Murky World Of AI Benchmarks” AI startup companies have been emerging at breakneck speed for the…
Every new SoC project starts with grand hopes of being on time and under budget. Those early hopes are usually…
A new technique increases the throughput of scan diagnosis, leading to better failure analysis and yield improvement.
Excerpt from article: “Designing Ultra Low Power AI Processors” “What makes power such a challenge to get right in an…
At the 2019 International Test conference, Joseph Sawicki, Executive Vice President of IC EDA at Mentor, a Siemens Business, delivered…
Excerpt from article: “New Ways To Optimize Machine Learning” Some projects are experimenting with larger strides. A stride of 2 means…
An improvement to BIST improves test coverage and time to improve functional safety of automotive ICs
Excerpt from article: “Mentor Masterclass on ML SoC Design” I was scheduled to attend the Siemens EDA tutorial at DVCon…
The ICs designed for use in advanced driver assistance systems or autonomous vehicles must meet stringent functional safety standards that…
