Streamlining 3D IC design interface performance
If you are planning to design a high-performance multi-chiplet heterogeneously integrated package, then you know that to achieve design performance, the integration between the logic chiplets is key. It is highly likely that you are planning to use the Universal Chiplet Interconnect Express (UCIe™) technology as your chiplet-to-chiplet communication protocol.
Navigating the UCIe compliance challenge
Chiplet-based designs using UCIe technology face a critical hurdle: ensuring protocol compliance and design feasibility for high-speed interconnections before committing to costly physical implementation. Without early verification, the risk of late-stage design failures increases significantly.
Strategic planning for optimal performance
To get the most performance and data throughput while using the least energy requires careful design planning. Before starting physical design, it’s important to look at the impact of:
- Material choices and substrate stackup
- Package types
- Chiplet microbump breakout structures
By using standards-based analysis and vendor model-based IBIS-AMI simulation, designers can converge on the optimal design space. The goal is to balance protocol settings and channel optimization to deliver specific targets for bandwidth, throughput, speed, and power consumption.
Introducing the Innovator3D IC™ Protocol Analyzer
To help designers achieve these goals in the most predictable manner, Siemens has created the Innovator3D IC™ Protocol Analyzer. This solution combines all essential tools into a single, unified technology:
- Channel Explorer: For early-stage architectural pathfinding.
- Compliance Analysis Cockpit: For both pre- and post-layout verification.
- Advanced Package Explorer: For parameterized 3D breakout model creation.
- Advanced EM Solvers: For full 3D hybrid and full-wave channel analysis.
- AI-Augmented Design Space Exploration: For optimizing protocol settings and channels.
This integrated approach gives designers confidence in design feasibility and accelerates the path to UCIe compliance, reducing both development risk and time-to-market.
Ready to learn more?
To find out more about how the Innovator3D IC Protocol Analyzer can streamline your workflow, visit the Innovator3D IC Protocol Analyzer page or contact your local Siemens EDA technology sales associate.
