Webinar

Power: Front & Center of the Silicon Design Process

April 6, 2022

Power is one of the most critical design metrics today, but it still is an afterthought in far too many…

By Mathilde Karsenti
2 MIN READ
Stanford University: Edge Machine Learning DNN Accelerator SoC Design Using Catapult HLS | Webinar

Stanford University: Edge Machine Learning DNN Accelerator SoC Design Using Catapult HLS | Webinar

September 3, 2021

This webinar describes the Edge Machine Learning Accelerator SoC design and verification of the systolic array-based DNN accelerator taped out by Stanford, the performance optimizations of the…

By Mathilde Karsenti
< 1 MIN READ
Advanced Synthesis for NanoXplore FPGAs | Webinar

Advanced Synthesis for NanoXplore FPGAs | Webinar

May 18, 2021

Many space and mil-aero applications require the use of specialized FPGAs with built-in protection from single event upsets. NanoXplore introduces…

By Mathilde Karsenti
< 1 MIN READ
Convolutional Neural Network Quantization for Low-Power | Webinar

Convolutional Neural Network Quantization for Low-Power | Webinar

April 23, 2021

Inferencing for Convolutional Neural Network(s) (CNNs) is notoriously compute intensive. This makes them an ideal candidate for hardware acceleration, which…

By russelklein
< 1 MIN READ
How MatchLib and SystemC Enables Early C-level Performance Analysis and Validation in an HLS Design Flow | Webinar

How MatchLib and SystemC Enables Early C-level Performance Analysis and Validation in an HLS Design Flow | Webinar

April 9, 2021

Learn how a High-Level Synthesis (HLS) design and verification flow built around Catapult HLS can dramatically speed up the design…

By michaelfingeroff
< 1 MIN READ