Verification Horizons
New RTL Modeling Constructs in Verilog
October 16, 2025
I’ve been packing up my office as Siemens is closing my location. This marks the longest I’ve ever spent in a single office, a whopping 15 years. Coincidentally, I was in the same building earlier with another company, Avant! for an additional 2 years. I’ve got a box of stuff from previous jobs that I rarely unpack. But it happened to go through it and found the proceedings from what was to become the first DVCon in 1992. I doubt these proceedings exist anywhere in digital form.
In the proceedings was a paper I published about a new RTL modeling construct I added to Verilog before it became an IEEE standard. It eventually became known as a NonBlocking Assignment (NBA).
