Many designers go to great lengths to make sure they do appropriate length-matching, even to the level of including the…
Yeah, that’s what I said. Vias are longer than their length. Phrased more appropriately, the delay introduced by a via has…
Too often I see people just using straight length to manage their board timing. Or take it one step further…
In the digital design world, we have typically only seen S-parameters used to model packages. They are a popular output…
You may have heard lately about IBIS-AMI models, which are being used more often for SERDES simulation. IBIS-AMI stands for I/O…
Anyone who has ever had to simulate a SERDES interface knows how long it take to run a couple hundred…
I talk with a lot of customers about their designs and what’s needed to get their products out the door…
We have all been in this industry long enough to experience the rapid changes in technology. I started design in…
Last week we released the official version of HyperLynx 8.1. If you’ve been a beta tester (I know there are…
