How NXP Achieved Robust Verification and Portfolio Re-characterization of Liberty IP with Solido Characterization Suite

At the Design Automation Conference (DAC), Siemens EDA and NXP collaborated to showcase innovative methodologies that directly address two of the most critical challenges in library characterization: accelerating Liberty (.lib) characterization and verification. Together, we presented solutions that redefine traditional approaches, creating efficient and reliable workflows that advance NXP’s design process.

Challenge

Accurate cell libraries are foundational to successful SoC design, with .lib files serving as the industry standard for representing timing, power, and noise. NXP’s Logic Library team supplies these libraries for diverse sectors, including automotive, IoT, and communications.

However, characterizing and verifying cell libraries is highly resource-intensive, involving billions of calculations and significant engineering time, especially for complex designs with large PVT sets. Any late-stage errors can drive up costs and delay projects.

Early, robust QA and efficient characterization are crucial to ensure reliable and timely delivery, enabling NXP teams to integrate new technologies confidently and support a range of demanding applications.

Solutions

Solution 1: Robust, Intuitive, AI-powered Liberty Verification

The first approach addresses Liberty data’s interpretive challenges with a robust, automated quality assurance solution embedded within NXP’s flow. Designed for accessibility and efficiency, the solution empowered by Solido Characterization Suite’s Analytics AI enables engineers, no matter their Liberty expertise, to intuitively detect and analyze errors with sophisticated automation.

The methodology excels at handling advanced Liberty features, including:

• Liberty Variation Format (LVF): Statistical variation data, including moments
• Composite Current Source (CCS): Timing, noise, and power waveforms

Key Takeaway

By automating comparison, verification, and PPA analysis of these advanced characteristics, the approach delivers effective savings in both engineering effort and computing resources for NXP.

Figure 1: NXP’s Comprehensive QA flow for Foundational IP Qualification and Reliability

Solution 2: AI-accelerated Portfolio Recharacterization

The second solution leverages cutting-edge AI algorithm advancements to condense characterization timelines for full cell library portfolios with Solido Characterization Suite Generator.

This novel two-step workflow consists of:

• Critical Corner Selection: AI algorithms from Solido Generator’s Anchor-opt utility identify seed Process-Voltage-Temperature (PVT) points, targeting only those most impactful to be characterized.
• Liberty Generation with AI: Following Characterization of seed PVTs, these seed corners are used as training data, where AI models in Solido Generator generate additional .libs, eliminating the need to run exhaustive characterization for every newly requested corner.

Key Takeaway

For NXP, this approach dramatically reduces runtime in both full and partial re-characterization scenarios, delivering faster portfolio turnarounds without compromising data quality

NXP’s Use Cases for Portfolio Characterization

Figure 2: NXP’s Use Cases for Portfolio Characterization

Summary

Together, these two complementary approaches have significantly transformed NXP’s Liberty (.lib) cell library workflows.

By embedding robust QA solutions directly into the flow, NXP achieved a 2x efficiency improvement in verification. Key benefits include impact analysis across PDK revisions, fully automated execution, streamlined validation of LVF moments data, early detection of LVF outliers, comprehensive coverage of Liberty QA checks, and deeper CCS waveform insights, especially in relation to non-linear delay model (NLDM) data.

Parallel advances in portfolio characterization delivered a 30% reduction in runtime and substantial savings in disk space and computational resources. This methodology relies on a critical corner selection step, powered by reinforcement learning, to identify optimal seed PVTs, ensuring high accuracy and avoiding the introduction of outliers in the resulting libraries.

Combined, these innovations enable rapid, reliable, and cost-effective Liberty library development, empowering NXP teams to deliver robust solutions to fast-evolving technology markets.

Acknowledgements

We would like to thank all leadership, support, and collaborators at NXP who contributed to the development and integration of these two complementary solutions.

Specifically, to Santhosh K, Khushboo R, Pramod G for the work done to incorporate robust verification within NXP’s QA flow, and to Reshma Krishnakumar, Swanand Kulkarni, Abhishek Sharma for portfolio re-characterization.