Improving Time-to-Market and Silicon Quality with a Streamlined IP QA Flow

By Wei-Lii Tan

Recently Felipe Schneider (from the Solido Crosscheck applications engineering team) and I hosted a live webinar on how to improve time-to-market and silicon quality by utilizing a better IP QA flow. The webinar garnered quite a bit of interest, and we got several great questions from people who tuned in, so I thought I would follow-up here with some additional information.

It’s no secret that readily-available, high quality design IP has not only shortened overall design cycle times, but also enabled design teams to utilize robust, well-tested IP components for frequently-implemented functionality in their silicon designs.

Regardless of whether design IP is produced in-house, or comes from an external provider, it’s important to have a strong IP QA methodologybetween the IP production team, and the integration team. This allows production teams to consistently ensure that IP is production-ready and validated, before being shipped out. It also allows IP integration teams to design with confidence with their IP, and minimize the risk of final signoff or post-tapeout problems stemming from IP integration issues.

A complete IP QA framework includes validation checks covering all necessary views, such as front-end (Verilog/VHDL, Liberty, UPF/CPF etc.), back-end (LEF/DEF/GDS etc.), SPICE, and others. It also includes functionality to help users deal with detected issues, like violation classification/waiving, reporting, visualization, and debugging.

Extensibility is important too. Users want the ability to extend the tool to handle custom formats or checks, and allow other tools to query results from the tool for downstream usage too.

Incorporating these capabilities into an IP QA methodology improves the process of outbound IP validation as well as incoming IP inspection. It benefits the entire team by shortening IP validation cycles, accelerating design tape-out time, and improving overall design quality.

We discuss these topics and more in our webinar. If you missed the live event, I encourage you to watch the OnDemand recording, available here.

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This article first appeared on the Siemens Digital Industries Software blog at