Producing and verifying 7/5/3nm IP Liberty models: the building blocks for leading-edge HPC, ML/AI and 5G designs

By Wei-Lii Tan

The first 5nm production chips have already been launched, such as Apple’s A14 Bionic, Qualcomm’s Snapdragon 888, and Samsung’s Exynos 1080. These chips will power leading edge mobile devices that would have been classified as supercomputers 20 years ago, and have 5G bandwidth capability that will allow us to download the entire latest Terminator movie in full 4K HD, in the time it takes to read this sentence.

Many of these innovations come from the engineering ingenuity of semiconductor design teams, as well as technology process node improvements. For semiconductor companies providing leading edge products in market segments such as mobile, HPC, and ML/AI, it’s a matter of when, not if, moving to the latest process node is required.

Our recent article, “Machine learning overcomes library challenges at the latest process nodes” at Tech Design Forum, we talk about how the latest challenges with producing and verifying Liberty models (.libs) for IP at 7/5/3nm process nodes can be addressed using machine learning. The amount and complexity of data in .libs have grown exponentially for advanced process nodes, so characterization and verification methodologies today require new approaches beyond just running brute-force SPICE simulations for characterization, or setting up elaborate rule sets for .lib validation.

As it turns out, the “ocean of data” in modern .libs that lead to extremely long SPICE characterization runtimes and month-long validation cycles, actually helps provide the accuracy required for machine learning methods to be applied in this use case. This allows the Solido Characterization Suite to help many of our customers speed up .lib characterization, as well as verify .lib content.

If you’re interested in learning more about Solido Characterization Suite, find out here!

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This article first appeared on the Siemens Digital Industries Software blog at