Aprisa and TSMC pave the way for mutual customers’ success at N3E 

By Janet Attar

When starting a project on a new node, designers spend a great deal of time figuring out which EDA tools work best for their chosen foundry’s process technologies.  

Siemens and TSMC recently announced that Aprisa, the digital implementation solution from Siemens, became certified for the TSMC N3E process, which helps our customers stay on the forefront of technology innovation. You can read the press release here.  

Inki Hong, general manager of the Aprisa digital implementation products, discussed the N3 certification during the most recent TSMC OIP Symposium, and how Aprisa with its support of TSMC’s N3 technologies, can help your design teams more smoothly navigate the transition to N3. 

TSMC’s certification of Aprisa for the foundry’s N3 process reinforces strong commitment by Siemens to investing in the digital implementation space. The N3 certification, together with Aprisa’s industry-leading ease-of-use, can help customers accelerate their migration to this node. 

“TSMC’s pace of innovation is remarkable, and we are proud to work with this partner for the benefit of our many mutual customers,” said Joe Sawicki, executive vice president, IC-EDA for Siemens Digital Industries Software. “Optimizing our EDA solutions for TSMC’s latest processes helps us provide our mutual customers with innovative solutions that satisfy their challenging and rapidly evolving market and business requirements.” Aprisa is proud of our long-standing collaboration with TSMC that allows our mutual customers to create innovative designs with confidence.  

For this certification, Aprisa successfully implemented the TSMC reference design (figure 1), passing all certification criteria. Aprisa met all power, timing, area, LVS convergence, signoff correlation, and runtime metrics, while also demonstrating DRC clean closure with Calibre. 

Screen shot of the TSMC reference design for N3
Figure 1. TSMC reference design for N3E certification.

In addition, Aprisa’s auto site balancing feature achieved balanced utilization of TSMC’s FinFlex library cells (figure 2), a must for the N3 node. 

A screen capture showing cell placement using Aprisa's site balancing for TSMC;s FinFlex library cells
Figure 2. Aprisa’s FinFlex-based placement.

Aprisa’s detail-route-centric architecture continues to produce tight correlation with signoff even at the most advanced nodes. This, in combination with its node-ready out-of-the-box flows, makes Aprisa the most flexible and easiest solution to adopt in the place-and-route market. 

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This article first appeared on the Siemens Digital Industries Software blog at