Portable Stimulus: Are you Ready for a Verification Revolution?

Portable Stimulus: Are you Ready for a Verification Revolution?

Depending on the revolution and who you happen to be within it, revolution is a risk to avoid at all...
Portable Stimulus and the Prius Model of New Technology Adoption

Portable Stimulus and the Prius Model of New Technology Adoption

Tesla and the New Technology Adoption Curve Over the past few years, I’ve noted with interest the increasing number of...
Taking the First Step in Portable Stimulus Adoption

Taking the First Step in Portable Stimulus Adoption

As the Chinese proverb says, “A journey of a thousand miles starts with a single step”. The first steps of...
It Don’t Mean a Thing … Without Methodology

It Don’t Mean a Thing … Without Methodology

Okay, so not nearly as catchy a title as the inspiration, but it’s something I’ve been thinking about as I’ve...
Better Virtual Sequences with Portable Stimulus

Better Virtual Sequences with Portable Stimulus

If you’ve used UVM for verification, you’ve almost certainly worked with virtual sequences. Once our needs for verification stimulus go...
Prospecting for Reusable Assets with Portable Stimulus

Prospecting for Reusable Assets with Portable Stimulus

You may have verification information in your organization that you can use now to jump-start creation of portable stimulus models...
Applying Portable Stimulus at DAC

Applying Portable Stimulus at DAC

It’s that time of year once again – DAC is just around the corner! I’m very excited to be able...
Portable Test – Portable Intent, Portable Realization, or Both?

Portable Test – Portable Intent, Portable Realization, or Both?

The Accellera Portable Stimulus Working Group (PSWG) has been hard at work defining a language specification for capturing portable test...
Developing Tests in Reverse with Portable Stimulus

Developing Tests in Reverse with Portable Stimulus

Whether developing tests for software or hardware, test development seems to follow a pretty predictable process: learn about the thing...
Test Intent, Test Realization, and Separation of Concerns

Test Intent, Test Realization, and Separation of Concerns

Separation of concerns is a key computer-science design principle to ensure creation of modular programs. Quoting from Wikipedia, “A concern...
Reusing Existing Descriptions with New Languages

Reusing Existing Descriptions with New Languages

New languages and descriptions are a key part of moving the state of the art forward in a given domain....
How Any Verification Engineer Can Quickly Create a Complex Testbench

How Any Verification Engineer Can Quickly Create a Complex Testbench

Over the past decade or so, the state of the art in design verification has taken a huge leap forward...
Portable Stimulus Applications at DVCon 2016

Portable Stimulus Applications at DVCon 2016

  It’s that time of the year again – time for verification engineers and vendors alike to show off the...
Modeling CPU Instruction Sets with a Portable Stimulus Specification

Modeling CPU Instruction Sets with a Portable Stimulus Specification

Portable Stimulus Specification tends to bring to mind applications where a given verification scenario needs to be reused across multiple...
DVCon, Reuse, and Software-Driven Verification

DVCon, Reuse, and Software-Driven Verification

I was fortunate to be able to attend DVCon this year. One of my favorite aspects of the DVCon show...
Portable Stimulus at DVCon

Portable Stimulus at DVCon

It’s amazing how quickly a year goes by. DVCon 2014 seems like it was just a few months ago, and...
Preparing for the Perfect Storm with New-School Verification Techniques

Preparing for the Perfect Storm with New-School Verification Techniques

Between 2006 and 2014, the average number of IPs integrated into an advanced SoC increased from about 30 to over...
Portable and Productive Test Creation with Graph-Based Stimulus

Portable and Productive Test Creation with Graph-Based Stimulus

Verification engineers spend lots of time creating tests. In fact, creating enough tests to verify the design functionality consistently tops...
Getting More Value from your Stimulus Constraints

Getting More Value from your Stimulus Constraints

Verification engineers put lots of effort into writing and tuning constraints for random stimulus. It’s critical that the constraints correctly...