Siemens EDA at the 58th Design Automation Conference

Welcome to the 58th Design Automation Conference, and welcome back to the beautiful city by the bay—San Francisco! The 58th DAC will be held at the Moscone Center West from December 5-9, 2021. I have been honored with an amazing opportunity to serve as this year’s DAC General Chair, and working with the DAC executive committee we have put together what I feel is a remarkable technical program

DAC has always been a unique event and this year is no exception. After all, DAC is the only event that brings together the entire design and automation ecosystem, which includes academic and industrial researchers, electronic executives and managers, IC and systems designers and developers, educators, and of course vendors.

For the 58th DAC, Siemens is a Platinum exhibitor, and our main booth is located at #2521; as well as our OneSpin booth located at #1539, and our Design Infrastructure Ally booth located at #1246. In addition to our exhibits, Siemens EDA has 42 employees actively participating in the technical program, which includes:

  • 1 Invited Industry Analyst Review
  • 2 DAC Pavilion Panel
  • 1 Tutorial
  • 7 Designer/IP/Embedded Track Presentations
  • 10 Posters

In this blog I plan to highlight a few of the Siemens EDA DAC program events that I plan to attend.

The first event I want to highlight is an invited analyst perspective of the electronic industry given by Joe Sawicki, executive vice president, Siemens EDA IC. Joe’s talk, titled Digitalization—The Return to Outsize Growth for the Semiconductor Industry, focuses on a massive reinvigoration of the semiconductor industry that will put us on a dramatic growth trajectory. Joe’s talk is scheduled for Monday, December 6th at 10:15am PST right after the keynote in the DAC Pavilion.

The second event I want to highlight is a Designer Track session organized by Siemens EDA’s Tom Fitzpatrick, and is titled UVM is 10 Years Old: What’s Next?, and is scheduled for Wednesday, December 8th at 1:30pm PST. The Universal Verification Methodology (UVM) is now 10 years old. In the past decade, the UVM ecosystem has grown to dominance of our industry, but what about the next 10 years? This session has put together a distinguish set of invited speakers, including Siemens EDA’s Ray Salemi.

The third event I want to highlight is another Designer Track panel moderated by Siemens EDA’s Dennis Brophy, titled UVM: Where the Wild Things Are. This panel will focus on specific enhancements being planned or considered to be added for the next revision of UVM IEEE 1800.2. Panelists have strong backgrounds in UVM development as current or past members of the UVM-WG in Accellera and/or IEEE and equally strong opinions on what is needed to keep UVM growing and relevant for functional verification.

And finally, the fourth event I want to highlight is a DAC Pavilion panel, titled Design and Verification Engineer 2.0—A New Generation or a Pipe Dream?, and is scheduled for Wednesday, December 8th at 2:00pm PST. This panel will debate the question “Will future DV engineers need to reinvent themselves and evolve into DV Engineer 2.0 who leverages AI/ML?” Siemens EDA’s Duaine Pryor is one of the distinguished panelist.

You can learn more about Siemens EDA technical participation at this year’s DAC by visiting the online program. In addition, visit www.dac.com for a full listing of all events at this year’s 58th DAC!

Oh, and act now, free I LOVE DAC advance registration ends on October 29, 2021! General advance registration ends on November 20, 2021.

Leave a Reply