If you haven’t seen it yet, the latest issue of the Verification Horizons Newsletter is now available on Verification Academy. This issue is dedicated to Stu Sutherland and Joe Daniels, two friends and colleagues who passed away this year.
The first article is an in-depth look at the impact that advanced verification techniques have on the protecting FPGAs from having non-trivial bugs escape into production. The data discussed in this article comes from Harry Foster’s biennial industry survey conducted by the Wilson Research Group, about which you can read more beginning here.
Next, we continue our series of helpful and practical techniques to apply the new Accellera Portable Test and Stimulus Standard to create better virtual sequences for your UVM environment than you can write on your own.
You’ll find some great ideas in “A New Approach to Low-Power Verification: Power Aware Apps” on how to apply the new UVM 3.0 information model API along with some Tcl code to create some apps to help with various aspects of verifying your low-power design.
Finally, we have an article on how simplify mixed-signal verification. Whether it’s for IoT, automotive, communication, industrial or some other application, you’ll learn how Mentor’s new Symphony Mixed-Signal Platform provides the flexibility, accuracy and performance to support a variety of methodologies to verify your analog designs alongside their digital counterparts. For fans of debug, you’ll see some pretty cool stuff there, too.
Please check out this great issue of Verification Horizons and if you are looking for future articles on a specific topic, let me know in the comments or send me an email.