Does anybody remember Daisy PLDMaster?
Some time back in the late Cretaceous, my first involvement in the use of programmable logic for prototyping relied on an EDA tool called PLDMaster; released by an early contemporary of Mentor Graphics, called Daisy Systems.
In essence, PLDMaster was simply schematic capture and functional simulation wrapped around Abel, CUPL and PALASM compilers, but it allowed dozens of PALs to be linked up into a pre-silicon model of a Gate Array. Magic!
Gate Arrays are now SoCs, and the distant descendants of those PALs are today’s FPGAs; half-a-million times bigger (and counting), and unrecognizably superior in every way. And me? I’ve continued to be involved in FPGAs in general, and FPGA prototyping in particular, over the subsequent geological epochs.
Yet, how far have we come really? I reckon that my Three “Laws” of Prototyping, coined during my years at Synplicity®, still apply more than they should. . .
As you may know, all that was Daisy Systems came via a long path to eventually become part of Mentor Graphics . . . and now, so have I.
It feels like coming home, and I find myself amongst Mentor’s team of FPGA prototyping experts, working far and wide across the globe. Even better, we have world-leading emulation as well. I’m like a kid running through the toyshop with Mum’s credit card!
This is my first blog as one of that Mentor FPGA team, and I look forward to helping prototypers everywhere overcome those obstacles that stubbornly remain in the way of us realizing the full potential of this fascinating and essential discipline that is FPGA prototyping.
As a first step, we’ve been overcoming the obstacle of visibility. Take a look at a new article in Verification Horizons which considers recent advances in the instrumentation and debug of FPGA prototypes.
I am looking forward to all your comments and questions.