Sparse linear algebra (SLA) operations are essential in many applications such as data analytics, graph processing, machine learning, and scientific…
High-Level Synthesis (HLS) has never been more in demand for chip design. In fact, it could be said that the…
This webinar describes the Edge Machine Learning Accelerator SoC design and verification of the systolic array-based DNN accelerator taped out by Stanford, the performance optimizations of the…
Learn how a High-Level Synthesis (HLS) design and verification flow built around Catapult HLS can dramatically speed up the design…
In this blog post, we explore the key points which are required to convert an algorithm developed for Vivado HLS…
Excerpt from article: “High-Level Synthesis at the Edge” Custom AI acceleration continues to gather steam. In the cloud, Alibaba has…
Excerpt from article: “Improving Algorithms With High-Level Synthesis” Most computer algorithms today are developed in high-level languages on general-purpose computers….
Excerpt from article: “Master the design and verification of next gen transport: Part Two – high-level synthesis” Part one of…
Excerpt from article: “AI Hardware Summit, Report#2: Lowering Power at the Edge with HLS” I previously wrote a blog about a…
