Excerpt from article: “Providing An AI Accelerator Ecosystem“
A key design area for AI systems is the creation of Machine Learning (ML) algorithms that can be accelerated in hardware to meet power and performance goals. Teams designing these algorithms find out quickly that a traditional RTL design flow will no longer work if they want to meet their delivery schedules. The algorithms are often subject to frequent changes, the performance requirements may evolve, and aspects of integrating into the target platform may change late in the design cycle. To complicate matters, the design team needs to recode the RTL to explore power, performance, and area trade-offs. Whether it is changing requirements or design space exploration, every change to the source design requires restarting the entire design and verification process, causing either unacceptable delays in the production schedule or missed opportunities to explore and create better hardware. (Figure 1*)
Instead, these teams turn to a high-level synthesis flow, such as that offered by the Catapult HLS Platform, for designing and verifying ML accelerators and connecting them to systems. The platform provides a complete design and verification flow from C++ to generated power and process technology optimized RTL.
Introducing the AI accelerator ecosystem
The Catapult HLS Platform provides a proven tool flow for IC designers. But, Siemens EDA has taken a big step farther and offers an AI accelerator ecosystem (Figure 2*) that provides AI designers with an environment to jumpstart projects.
*These images are available in full article
Read the entire article on SemiEngineering originally published on June 27th, 2019.