Transform Your IP Selection Process with Solido Library Profiler
At the heart of every breakthrough technology lies intellectual property (IP), powering everything from cutting-edge System-on-Chips (SoCs) to specialized Application-Specific Integrated Circuits (ASICs). Choosing the correct IP is crucial for cost efficiency, resource savings, and minimizing risk in the end-product.
However, the IP selection process itself isn’t as straightforward as simply choosing the most advanced technology nodes or recent offerings from foundries. Many considerations must be made based on the compatibility, reliability, and inherent characteristics of the IP. Of these characteristic traits in the IP, optimization is required for power, performance, and area (PPA) as they directly influence the functionality and efficiency of the final product.
In this blog, we’ll explore how Solido Library Profiler unlocks powerful insights to transform your IP selection process.
The IP Selection Process
IP selection is a heavily tool dependent process that requires multiple stages in a physical design workflow. It often requires creating multiple reference designs of potential IP, that are run through several iterative cycles of static-timing-analysis (STA), place and route (P&R), and synthesis. Although each step of this flow is necessary in finalizing and verifying final physical designs, they can be rudimentary, repetitive, and time consuming for the purposes of simply selecting an IP to start with.
Liberty Files in IP
Liberty (.lib) files are the standardized industry format to describe characteristics of IP components, including standard cells, memory, analog blocks, and IOs. Liberty files contain the performance (timing), power, and area (PPA) alongside supplementary statistical, and noise data of an IP. Liberty is critical as input to the digital design stages of STA, P&R, and synthesis. The liberty files are often collected into their respective libraries, with variations of liberty files based on process, voltage, and temperature (PVT) operating conditions.
It seems intuitive then that Liberty could be leveraged for early identification of the ideal IP for a specific application. This notion was theorized in the past but was difficult from a technical standpoint. Comparisons across libraries are a daunting task, attributed to the breadth of information contained within a liberty, alongside the differences in structure of the data itself across various providers and different tech nodes.
Solido Library Profiler for Smart IP Selection
In recent years, the team at Solido have researched new innovations to bring this once impossible concept to life. The culmination of this work produced Solido Library Profiler, the newest analysis tool within the Solido Characterization Suite for library comparison and analysis to optimize PPA directly within the liberty file. The basis of the comparison uses intelligent apples-to-apples alignment of liberty data, regardless of the source provider or tech node. This smart technology maps out the key differences across potential IPs from the cell level all the way down to pins and arcs.
This allows IP selection teams to efficiently select the correct library early in the physical design flow, minimizing reference design runs through the STA, PR, and synthesis cycles. This drastically saves engineering and compute resources, enabling downstream development and tool usage for final IP to be dedicated to the most important steps ahead, reducing the bottleneck in the IP selection process.
Solido Library Profiler enables a single iteration for IP selection
Smart IP Selection with Infineon
Leading companies are already leveraging Solido Library Profiler, alongside existing, complementary tools from the Solido Characterization Suite, to enable a wide range of applications. A recent collaboration with Infineon, highlighted in presentation, demonstrates this approach, combining Library Profiler and Solido Generator to create a comprehensive IP selection methodology that ensures project requirements are met. This is only one example of the insights unlocked through Library Profiler, with many more cases coming to light.
By removing traditional IP selection bottlenecks and making PPA analysis accessible to all, we’re enabling design teams to make faster and more informed decisions that ultimately accelerate innovation across the semiconductor landscape
Ready to optimize your IP selection workflow? Connect with our team to explore how Solido Library Profiler can address your specific needs.
